<p id="isPasted">A new study led by chemists at the University of Illinois Urbana-Champaign brings fresh insight into the development of semiconductor materials that can do things their traditional silicon counterparts cannot – harness the power of chirality, a non-superimposable mirror image.</p><p>Chirality is one of nature’s strategies used to build complexity into structures, with the DNA double helix perhaps being the most recognized example – two molecule chains connected by a molecular “backbone” and twisted to the right. &nbsp;</p><p>In nature, chiral molecules, like proteins, funnel electricity very efficiently by selectively transporting electrons of the same spin direction.</p><p id="isPasted">Researchers have been working for decades to mimic nature’s chirality in synthetic molecules. A new study, led by&nbsp;<a href="https://chbe.illinois.edu/" target="_blank">chemical and biomolecular chemistry</a> professor&nbsp;<a href="https://chbe.illinois.edu/directory/profile/yingdiao" target="_blank">Ying Diao</a>, investigates how well various modifications to a non-chiral polymer called DPP-T4 can be used to form chiral helical structures in polymer-based semiconductor materials. Potential applications include solar cells that function like leaves, computers that use quantum states of electrons to compute more efficiently and new imaging techniques that capture three-dimensional information rather than 2D, to name a few.</p><p>The study findings are reported in the journal ACS Central Science.&nbsp;</p><p>“We started by thinking that making small tweaks to the structure of the DPP-T4 molecule – achieved by adding or changing the atoms connected to the backbone – would alter the torsion, or twist of the structure, and induce chirality,” Diao said. “However, we quickly discovered that things were not that simple.”</p><p>Using X-ray scattering and imagining, the team found that their “slight tweaks” caused major changes in the phases of the material.&nbsp;</p><p>“What we observed is a sort of Goldilocks effect,” Diao said. &nbsp;“Usually, the molecules assemble like a twisted wire, but suddenly, when we twist the molecule to a critical torsion, they started to assemble into new mesophases in the form of flat plates or sheets. By testing to see how well these structures could bend polarized light – a test for chirality – we were surprised to discover that the sheets can also twist into cohesive chiral structures.”</p><p>The team’s findings illuminate the fact that not all polymers will behave similarly when tweaked in an effort to mimic the efficient electron transport in chiral structures. The study reports that it is critical to not overlook the complex mesophase structures formed to discover unknown phases that can lead to optical, electronic and mechanical properties unimagined before.</p><p>Purdue University professor Jianguo Mei and graduate student Xuyi Luo synthesized the polymers used in this study. Diao also is affiliated with&nbsp;<a href="http://matse.illinois.edu/" target="_blank">materials science and engineering</a>, <a href="https://chemistry.illinois.edu/" target="_blank">chemistry</a>, the <a href="https://mrl.illinois.edu/" target="_blank">Materials Research Laboratory&nbsp;</a>and the <a href="https://beckman.illinois.edu/" target="_blank">Beckman Institute for Advanced Science and Technology</a> at Illinois.</p><p>The Office of Naval Research, the Air Force Office of Scientific Research, the National Science Foundation and the U.S. Department of Energy supported this research</p>

An optical micrograph showing the chiral liquid crystal phase of a polymer that researchers are exploring to produce highly efficient semiconductor materials. Image courtesy Ying Diao Lab

A new study led by chemists at the University of Illinois Urbana-Champaign brings fresh insight into the development of semiconductor materials that can do things their traditional silicon counterparts cannot – harness the power of chirality, a non-superimposable mirror image.

Researchers identify unexpected twist while developing new polymer-based semiconductors

<p><span contenteditable="false" draggable="true" class="fr-video fr-deletable fr-fvc fr-dvb fr-draggable"><iframe width="640" height="360" src="https://www.youtube.com/embed/obKPOq_qoOg?&amp;wmode=opaque&amp;rel=0&amp;enablejsapi=1&amp;origin=https://www.wevolver.com" frameborder="0" allowfullscreen="" class="fr-draggable" data-lf-form-tracking-inspected-kn9eq4roawkarlvp="true" data-lf-vimeo-playback-inspected-kn9eq4roawkarlvp="true" data-lf-yt-playback-inspected-kn9eq4roawkarlvp="true"></iframe></span><em>(Video by Bumper DeJesus and Scott Lyon)</em></p><p id="isPasted">The device marks a new approach to fabricating and powering soft robots, which rely on flexible rather than rigid bodies to move and carry out tasks. Scientists believe soft robots will be useful in everything from surgery to space exploration, but designing and controlling soft bodies comes with its own engineering challenges that differ from rigid-body robotics.</p><p>This robot makes use of the piezoelectric effect, which transfers electrical energy into mechanical energy that can power the robot with carefully timed pulses. One pulse causes the flexible body to bend one way; a different pulse causes it to bend the other way. Using advanced power electronics designs and embedded sensors and control systems, the team created a fully untethered soft robot that has an energy efficiency comparable to land animals. Called eViper, this new wiggling machine could lead the way on making robotic systems more energy efficient for a future with exploding demand.</p><p><span class="fr-img-caption fr-fic fr-dib" style="width: 768px;"><span class="fr-img-wrap"><img src="https://s3-us-west-1.amazonaws.com/wevolver-project-images/froala%2F1700787479193-wiggling_20231018_inchbot_bd_and2677_16x9-1536x864.jpg" style="width: 766px;" class="fr-fic fr-dib"><span class="fr-inner">A close-up of the eViper soft robot. (Photo by Bumper DeJesus)</span></span></span></p><p id="isPasted">“Future robotic systems need high energy efficiency,” said&nbsp;<a href="https://ece.princeton.edu/people/minjie-chen" target="_blank">Minjie Chen</a>, an assistant professor of electrical and computer engineering and one of the project’s principal investigators. “The eViper platform enables us to explore electrical, mechanical and power co-design to maximize the energy efficiency.”</p><p>The team has published a raft of papers on this project over the past year. The&nbsp;<a href="https://arxiv.org/abs/2303.01676" target="_blank">latest paper</a>, presented at the 2023 IEEE International Conference on Intelligent Robots and Systems (IROS), was among the&nbsp;<a href="https://ieee-iros.org/iros-2023-award-winners/" target="_blank">finalists for a best paper award</a>.</p><p>In addition to Chen, the research was led by Princeton graduate students Hsin Cheng, Zhiwu Zheng and Prakhar Kumar, and professors Naveen Verma, James Sturm and Sigurd Wagner. The work has received support from Princeton Materials Institute, Princeton Plasma Physics Laboratory, Semiconductor Research Corporation, and the Andlinger Center for Energy and the Environment.</p>

Princeton researchers have developed a flexible, lightweight and energy efficient soft robot that moves without the use of any legs or rotary parts. Instead, the device uses actuators that convert electrical energy into vibrations that allow it to wiggle from point to point using only a single watt.

Inch by inch, this machine is leading soft robotics telecient future

<p id="isPasted">In today's ever-evolving technological landscape, optimizing energy consumption in embedded devices is of paramount importance. This article sheds light on the pivotal role of debug UART logs in power profiling and explores how this synergy benefits developers and engineers alike.</p><p><strong>Debug UART Logs: A Power Profiling Asset</strong></p><p>By connecting your embedded device's debug UART to <a href="https://www.qoitech.com/products/" target="_blank" rel="noopener noreferrer">Qoitech's Otii box</a>, you unlock a potent capability – the ability to timestamp log data alongside power consumption measurements. This fusion of debugging and power profiling offers a formidable solution for scrutinizing power consumption during the development and testing phases.</p><p><strong>Why Debug UART Logs Matter</strong></p><ol><li><strong>Efficiency Optimization</strong>: Real-time insights into your embedded device's behavior, combined with power consumption data, enable you to identify power-hungry hardware components or inefficient firmware code. This knowledge is essential for optimizing your embedded device's energy efficiency, especially when refining hardware and firmware.</li><li><strong>Debugging Power-Related Issues</strong>: Synchronized debug UART logs and power measurements facilitate the pinpointing of energy-draining events or operations during development. This simplifies the task of identifying and addressing power-related issues, making debugging more efficient.</li><li><strong>Reduced Development Time</strong>: Merging debug and power profiling streamlines development. You can swiftly identify and rectify power issues, resulting in shorter development cycles and faster time-to-market.</li><li><strong>Cost Savings</strong>: Effective power management translates to extended battery life for portable embedded devices and reduced electricity costs for mains-powered devices. This can lead to substantial cost savings in the long run.</li></ol><p><strong>Benefits for IoT and Embedded Professionals</strong></p><ol><li><strong>Hardware Developers</strong>: This technique empowers you to create energy-efficient embedded devices, offering improved user experiences, longer battery life, and reduced environmental impact. It also expedites the identification and resolution of power-related bugs, saving valuable development time.</li><li><strong>Software Developers</strong>: Debug UART power profiling can enhance the performance of embedded and application software. Recognize that low-power consumption involves not only hardware but also the entire system and ecosystem, where applications or protocols could be energy drains.</li><li><strong>Product Managers</strong>: Ensure that embedded devices meet energy efficiency standards and deliver exceptional performance, resulting in higher customer satisfaction and potentially increased market share.</li><li><strong>Researchers</strong>: Utilize this technique for experiments, data collection, and contributing to the advancement of energy-efficient technologies.</li></ol><p><strong>Conclusion</strong></p><p>Understanding the factors that drain energy provides invaluable insights into your IoT device's operation, enabling informed decisions to develop low-power embedded devices. For a comprehensive, step-by-step guide on implementing this process using Otii Arc/Ace Pro, please consult the <a href="https://www.qoitech.com/docs/quick-start/setup-uart-recording" target="_blank" rel="noopener noreferrer">Otii documentation</a>.</p>

UART log sync with power measurements with Otii Ace Pro

Understanding what drains energy is a game-changer, whether you're a developer crafting the next IoT breakthrough, fine-tuning an embedded system, or simply interested in gauging the power efficiency of your devices.

Efficient IoT Design: Synchronized UART Logging and Power Measurement

A circuit board showing its traces, vias, electronic components, solder mask and more.

Unveiling the Art and Science Behind Circuit Boards - Copper Etching to Silkscreens, a Comprehensive Guide to Elements, Manufacturing Processes, and Multilayered Varieties in Electronic Circuit Boards 

What are Circuit Boards Made Of? An Extensive Guide to Materials and Manufacturing Processes

<p id="isPasted">Diagnosing sleep disorders such as sleep apnea usually requires a patient to spend the night in a sleep lab, hooked up to a variety of sensors and monitors. Researchers from MIT, Celero Systems, and West Virginia University hope to make that process less intrusive, using an ingestible capsule they developed that can monitor vital signs from within the patient’s GI tract.</p><p>The capsule, which is about the size of a multivitamin, uses an accelerometer to measure the patient’s breathing rate and heart rate. In addition to diagnosing sleep apnea, the device could also be useful for detecting opioid overdoses in people at high risk, the researchers say.</p><p>“It’s an exciting intervention to help people be diagnosed and then receive the appropriate treatment if they suffer from obstructive sleep apnea,” says Giovanni Traverso, an associate professor of mechanical engineering at MIT and a gastroenterologist at Brigham and Women’s Hospital. “The device also has the potential for early detection of changes in respiratory status, whether it’s a result of opiates or other conditions that could be monitored, like asthma or chronic obstructive pulmonary disease (COPD).”</p><p>In a study of 10 human volunteers, the researchers showed that the capsule can be used to monitor vital signs and to detect sleep apnea episodes, which occur when the patient repeatedly stops and starts breathing during sleep. The patients did not show any adverse effects from the capsule, which passed harmlessly through the digestive tract.</p><p>Traverso is one of the senior authors of the study, along with Robert Langer, an MIT Institute Professor and member of MIT’s Koch Institute for Integrative Cancer Research; Victor Finomore, director of the Human Performance and Applied Neuroscience Research Center at the West Virginia University School of Medicine; and Ali Rezai, director of the Rockefeller Neuroscience Institute at the West Virginia University School of Medicine. The paper appears today in the journal <em>Device</em>.</p><p><span contenteditable="false" draggable="true" class="fr-video fr-deletable fr-fvc fr-dvb fr-draggable"><iframe width="640" height="360" src="https://www.youtube.com/embed/faqD5gosuXo?&amp;wmode=opaque&amp;rel=0&amp;enablejsapi=1&amp;origin=https://www.wevolver.com" frameborder="0" allowfullscreen="" class="fr-draggable" data-lf-form-tracking-inspected-kn9eq4roawkarlvp="true" data-lf-yt-playback-inspected-kn9eq4roawkarlvp="true" data-lf-vimeo-playback-inspected-kn9eq4roawkarlvp="true"></iframe></span></p><h2 id="isPasted"><strong>Vital sign measurements</strong></h2><p>Over the past decade, Traverso and Langer have developed a range of ingestible sensors that could be used to&nbsp;<a href="https://news.mit.edu/2015/ingestible-sensor-measures-heart-breathing-rates-1118" target="_blank">monitor vital signs</a> and diagnose disorders of the GI tract, such as&nbsp;<a href="https://news.mit.edu/2017/flexible-sensors-can-detect-movement-gi-tract-1010" target="_blank">gastrointestinal slowdown</a> and&nbsp;<a href="https://news.mit.edu/2023/smart-pill-can-track-biological-markers-real-time-0908" target="_blank">inflammatory bowel diseases</a>.</p><p>This new study focused on measuring vital signs, using a capsule developed by Celero Systems that includes an accelerometer that detects slight movements generated by the beating of the heart and the expansion of the lungs. The capsule also contains two small batteries and a wireless antenna that transmits data to an external device such as a laptop.</p><p>In tests in an animal model, the researchers found that this capsule could accurately measure breathing rate and heart rate. In one experiment, they showed that the sensor could detect the depression of breathing rate that resulted from a large dose of fentanyl, an opioid drug.</p><p>Building on those results, the researchers decided to further test the capsule in a clinical trial at the&nbsp;<a href="https://rni.wvumedicine.org/" target="_blank">West Virginia University Rockefeller Neuroscience Institute</a>. Ten patients who enrolled in the study were monitored using the ingestible capsule, and these patients were also connected to the sensors typically used to monitor sleep, so the researchers could compare measurements from both types of sensors.</p><p>The researchers found that their ingestible sensor was able to accurately measure both breathing rate and heart rate, and it also detected a sleep apnea episode that one of the patients experienced.</p><p>“What we were able to show is that using the capsule, we could capture data that matched what the traditional transdermal sensors would capture,” Traverso says. “We also observed that the capsule could detect apnea, and that was confirmed with standard monitoring systems that are available in the sleep lab.”</p><p>In this study, the researchers monitored signals emitted by the capsule while it was in the stomach, but in a previous&nbsp;<a href="https://news.mit.edu/2015/ingestible-sensor-measures-heart-breathing-rates-1118" target="_blank">study</a>, they showed that vital signs can also be measured from other parts of the GI tract.</p><p>“The stomach generally offers some of the best signals, mainly because it’s close to the heart and the lungs, but we know that we can also sense them elsewhere,” Traverso says.</p><p>None of the patients reported any discomfort or harm from the capsule. Radiographic imaging performed 14 days after the capsules were ingested revealed that all of them had passed through the patients’ bodies. The research team’s previous work has shown that objects of similar size usually move through the digestive tract in a little more than a day.</p><h2><strong>Close monitoring</strong></h2><p>The researchers envision that this kind of sensor could be used to diagnose sleep apnea in a less intrusive way than the skin-based sensors that are now used. It could also be used to monitor patients when they begin treatment for apnea, to make sure that the treatments are effective.</p><p><a href="https://celerosystems.com/" target="_blank">Celero Systems</a>, a company founded by Traverso, Langer, Jeremy Ruskin, a professor of medicine at Harvard Medical School, and Benjamin Pless, now CEO of the company, is now working on sensors that could be used to detect sleep apnea or opioid overdose.</p><p>“We know that people who have had an overdose are at higher risk of recurrence, so those individuals could be monitored more closely so that in the event of another overdose, someone could help them,” Traverso says.</p><p>In future work, the researchers hope to incorporate an overdose reversal agent such as nalmefene into the device, so that drug release would be triggered when the person’s breathing rate slowed or stopped. They are also working on strategies to lengthen the amount of time that the capsules could remain in the stomach.</p><p>The research was funded by the Karl van Tassel Career Professorship, MIT’s Department of Mechanical Engineering, and Celero Systems.</p><p>Authors of the paper also include Pless, James Mahoney, Justin Kupec, Robert Stansbury, Daniel Bacher, Shannon Schuetz, and Alison Hayward.</p>

Diagnosing disorders such as sleep apnea usually requires a night in a sleep lab, hooked up to sensors and monitors. Researchers hope to ease that process with an ingestible capsule that can monitor vital signs from within a patient’s GI tract. Image: MIT News

The new sensor measures heart and breathing rate from patients with sleep apnea and could also be used to monitor people at risk of opioid overdose.

Ingestible electronic device detects breathing depression in patients

<p id="isPasted">Synthetic biology holds the promise of enhancing and modifying biological systems into innumerable new technologies for the benefit of society. This engineering approach to biology has already reaped benefits in the fields of drug delivery, agriculture, and energy production. In a paper published in Nature Chemical Biology, EPFL researchers at the Laboratory of Protein Design and Immunoengineering (<a href="https://www.epfl.ch/labs/lpdi/" target="_blank">LPDI</a>) at the School of Engineering have taken an important step in designing more performative biological systems. By observing complex self-regulating behavior in cells and taking inspiration from electrical engineering, they have engineered a sophisticated biological switch using modified proteins as the hardware.</p><blockquote><p>We use a number of approaches in terms of protein design, more specifically computational protein design, in order to engineer new molecular hardware.</p><footer>Professor Bruno Correia, head of LPDI</footer></blockquote><p>The goal of LPDI is to develop biological functions that imitate and even go beyond what nature has provided over millions of years of evolution. “We use a number of approaches in terms of protein design, more specifically computational protein design, in order to engineer new molecular hardware,” says Bruno Correia, head of LPDI and lead author the paper. This new biological hardware—in the form of engineered proteins—can then be placed in living cells and respond to stimuli that the engineer can closely control.</p><p>The lab’s methodology begins by observing how cells function and imitating or adapting these functions for other uses. One of the things that nature does extremely well is self-regulation. When a cell needs more ions, for example, it activates mechanisms that allow for the ions to flow into the cell. Once the cell’s needs are met and it has reached a certain equilibrium known as homeostasis, it can then turn off the ion flow.</p><p>This biological mechanism can be conceptually likened to the selective nature of a bandpass filter in electronics. While a bandpass filter discriminates signals based on a specific range of frequencies, allowing only those within a designated band to pass through, the cell selectively permits ions to enter or exit based on its current needs. Although the comparison is a simplification, as the biological process is governed by complex biochemical feedback rather than binary signals, it similarly achieves selective permeability—akin to how a bandpass filter selectively permits certain frequencies while excluding others.</p><blockquote><p>Sailan Shui took inspiration from the functioning of a bandpass filter and engineered its biological equivalent.</p><footer>Professor Bruno Correia, head of LPDI</footer></blockquote><p>A current limitation in synthetic biology is that no design, up until now, offers this type of functionality—it’s all or nothing, only ‘on’ or only ‘off’. Think of penicillin delivery. As there is no regulatory system based on biological sensors for drug dosing, a diabetic needs to continuously monitor the insulin level. Sailan Shui’s work at LPDI focused on these types of biological sensors and switches that could drastically improve drug delivery and other biological systems. “Shui was unsatisfied by the on/off paradigm and decided to engineer a switch that could respond to changes in a cell’s internal and external environment. So she took inspiration from the functioning of a bandpass filter and engineered its biological equivalent,” explains Correia.</p><p>To create this novel function in biological systems, the team designed proteins and inserted them into living cells. In biology, function flows from form. Correia and Shui observed the structure of folded proteins and their effect on self-regulating functions inside the cell. They then created computational models that could potentially act as a bandpass filter from these observations. Once the digital design was validated using computer simulations, they started working on building the protein structure by manipulating its DNA and amino acid configuration. Finally, they tested the design in cell cultures. The results are conclusive. Their design, which they share with the research community in the spirit of open research, will most likely be used by researchers around the world in ways yet foreseen.</p><p>As a hypothetical application in synthetic biology, researchers could create a system that operates similarly to an electronic bandpass filter to regulate insulin delivery based on blood glucose levels. Engineered proteins would serve as sensors, detecting high glucose and triggering insulin release until levels normalize. This would automate insulin dosing, potentially improving diabetes management and reducing the need for frequent monitoring. Such a system would represent a significant advancement in the use of synthetic biology for therapeutic applications.</p><p>This fundamental research is essential for developing the tools, building blocks and hardware of the future of synthetic biology. “We have a clear methodology but also embrace the serendipity of science. It was the scientist Leo Scheller in my lab who had the vision to understand the importance of this work. It was a team effort,” says Correia. A team effort that brings the field one important step closer to engineering better drug delivery technology, more efficient bioreactors, and even entirely new forms of biological entities.</p><hr><p><strong id="isPasted">References</strong></p><p>Shui, S., Scheller, L. &amp; Correia, B.E. Protein-based bandpass filters for controlling cellular signaling with chemical inputs. Nat Chem Biol (2023).&nbsp;<a href="https://doi.org/10.1038/s41589-023-01463-7" target="_blank" rel="noopener">https://doi.org/10.1038/s41589-023-01463-7</a></p>

EPFL scientists have crafted a biological system that mimics an electronic bandpass filter, a novel sensor that could revolutionize self-regulated biological mechanisms in synthetic biology.

A bandpass filter for synthetic biology

Gerber File Schematic in PCB Manufacturing

This article provides an in-depth view of Gerber files, including their origin, structure, and role in PCB design and manufacturing processes.

What are Gerber Files? Understanding the Blueprint of Electronics Manufacturing

<section id="isPasted"><p>Reusing established designs and concepts is standard practice in some industries, but not in others. For example, the automobile industry has been creating product lines out of a single basic design for decades. Mobile phone developers slightly tweak and add features to the cellphone design and release a new iteration every year.</p><p><br>This concept also extends beyond technology. For instance, housing developers mass-produce homes using a common layout, while clothing designers employ templates for apparel in various colors and materials.</p><p><br>In the context of PCBA manufacturing, design reuse is simply implementing established circuitry and designs in product development. This practice allows developers to utilize proven electrical circuits and PCBA layouts repeatedly, rather than starting from scratch with each new project. While this may sound like a no-brainer, PCBA development is still catching up to other industries when it comes to reusing proven design concepts.</p><p><br>In this blog we’ll look at the potential benefits of design reuse, what’s holding it back in the PCBA arena, and what the future might look like for PCBA developers implementing established IP in their designs.</p><h2><br></h2><h3>Why PCBA Design Reuse is Becoming More Common</h3><img data-fr-image-pasted="true" src="https://www.macrofab.com/assets/uploads/blog/checkpoint-pcba-board.webp" alt="Checkpoint pcba board" class="fr-fic fr-dii"><p>The rapidly evolving market today demands quick product development cycles. This fast pace presents a challenge, particularly for PCBA design teams where qualified workers are in short supply and are hard or impossible to replace.</p><p><br>Recognizing this, many teams now use design reuse strategy as an efficient countermeasure. By reapplying successful circuitry and designs, these lean teams can streamline their design process. Rather than starting from scratch and building new designs, they adapt and enhance existing layouts. This accelerates product development and rollout.</p><p><br>Ultimately, design reuse empowers PCBA design teams to achieve more with fewer resources, providing an agile workflow that can swiftly respond to dynamic market needs.</p><h2><br></h2><h3>Benefits of Design Reuse</h3><p>Applying existing designs throughout the entire design process can lead to significant savings in time and resources. Many PCBA layouts and designs use similar circuitry for power supplies, drivers, memory, etc, allowing developers to leverage these for basic functionality and save valuable design and troubleshooting time. It is advantageous to use established designs since they have already been tested in real-life applications.</p><img data-fr-image-pasted="true" src="https://www.macrofab.com/assets/uploads/blog/small-pcba-held-up-to-a-light.webp" alt="Small pcba held up to a light" class="fr-fic fr-dii"><p>Signal integrity analysis and simulation are time-consuming aspects of the development process, especially when high-speed memory interfaces are involved that can lead to signal crosstalk and/or reflections, which can degrade signal integrity. These kinds of unpredictable potential issues have already been vetted into existing, established circuitry.</p><p><br>When the time comes to deliver a product to the client, existing designs with compatible connectors that have already been successfully integrated into a customer’s system save troubleshooting time for the customer as well.</p><p><br>Taking the idea a step further, PCBA developers can design basic templates for modular PCBA layouts with common components that designers can use as a foundation for more intricate designs with enhanced functionality. For instance, a designer could swap out the interface board on a PCBA board template for another wireless interface without having to swap out the processor or the storage boards as well.</p><p><br>Developers will still have to adjust their designs based on factors like form factor and physical board space, but it’s usually easier to tweak an existing design than to start from scratch. In the aggregate, design reuse can result in shorter and more frequent development cycles, a wider range of products, and the opportunity to get those products to the market more quickly.</p><h2><br></h2><h3>Ways to Effectively Implement Design Reuse</h3><p>For an organization to fully realize the potential of design reuse, it usually requires the creation of a resource library that cross-references designs based on factors such as layout, components, and form factor.</p><img data-fr-image-pasted="true" src="https://www.macrofab.com/assets/uploads/blog/mans-hands-testing-pcba-electronic-equipment.webp" alt="Mans hands testing pcba electronic equipment" class="fr-fic fr-dii"><p>For example, a developer working on a project can look back on previous product designs for a specific customer to identify previously integrated components or connectors. Basic designs with commonly implemented components (i.e., power supply, processor, memory boards, etc.) can then be repurposed and modified to meet a different client’s needs without having to start from scratch.</p><p><br>By thinking of PCBA design as moving chess pieces on, off, or around the board, modular design practices make this kind of cutting and pasting approach more feasible. Making an older design a viable solution for a new project could be as simple as swapping out a connector or an interface board. Modular design can also help in the development of product lines, like boards with the same basic layouts but with different processors or added functionality for different implementations.</p><p><br>Organizational awareness and communication is the prevailing factor, ensuring developers have access to one another’s schematics, templates, and PCBA layouts and the practical history of those designs, i.e. how they’ve performed in certain settings and implementations.</p><p><br>This shared knowledge can help avoid common design problems like connector wear after repeated insertions or power trace aging at high currents, information that can be extremely valuable in avoiding similar design issues in the future.</p><p><br>Initially, these advantages might not seem significant on a project-by-project basis, but over time, this kind of design sharing will have a cumulative effect on the bottom line.</p><img data-fr-image-pasted="true" src="https://www.macrofab.com/assets/uploads/blog/close-up-pcba-robotic-testing.webp" alt="Close up pcba robotic testing" class="fr-fic fr-dii"><h3>The Future of Design Reuse in PCBA Design</h3><p>While repeatedly reusing the same modules and components can enhance efficiency, it also risks design complacency. This occurs when developers prioritize tried-and-true solutions over innovative, creative ones.</p><p><br>It’s an issue PCBA developers should be aware of. However, the potential long-term benefits of design reuse are too crucial to overlook. Not only does this strategy alleviate developers’ workload, but it also simplifies the customer experience and trims down troubleshooting and beta testing time. Thus, for PCBA developers seeking to optimize their processes, embracing design reuse can be an obvious and sensible choice.</p><h4>Want more design tips? Download MacroFab’s</h4><a href="https://www.macrofab.com/documents/pcba-design-handbook-2023/" target="_blank">ENGINEERING ESSENTIALS: THE PCBA DESIGN HANDBOOK</a></section><section><h4><br></h4></section>

Today’s rapidly evolving market requires quick product development cycles, presenting a challenge for PCBA design teams that are short on qualified workers

Why PCBA Design Reuse is Becoming More Common

<h1 dir="ltr" id="isPasted">Introduction</h1><p dir="ltr">In an age where data is the new gold, and digital infrastructure forms the backbone of our society, the importance of data security cannot be overstated. Silicon-level security refers to the protective measures embedded at the hardware level of computing devices. It is a fundamental layer that underpins the reliability and trustworthiness of everything from consumer electronics to critical national infrastructure.</p><p dir="ltr">As we usher in the era of ubiquitous computing, with billions of connected devices exchanging data every second, the stakes for robust security have never been higher. The concept of silicon-level security isn't new; however, the complexity and sophistication of threats it must mitigate have evolved dramatically. Gone are the days when simple perimeter defenses were sufficient. Today's security architects must assume a posture of 'defense in depth', where multiple layers of security measures are integrated into the silicon itself.</p><p dir="ltr">This proactive approach to security is vital as the functionality and value of devices increasingly hinge on their ability to protect and process sensitive data securely. Whether it's financial transactions, personal information, or state secrets, the common denominator is the silicon that processes and stores this data. Thus, the integrity of silicon-level security mechanisms is a paramount concern, laying the foundation for trust in the digital age.</p><p dir="ltr">In the following sections, we'll delve into the intricate world of secure interface technologies, unpack the challenges faced by modern System on Chip (SoC) designs, and explore how advancements in technology are paving the way for stronger, more resilient security measures. &nbsp;&nbsp;</p><h1 dir="ltr">The Backbone of Security: Root of Trust and Cryptography IP</h1><p dir="ltr">At the heart of silicon-level security is the concept of a 'Root of Trust' (RoT), a set of functions trusted implicitly by the system due to their foundational role in ensuring overall security. The RoT provides a secure starting point for system boot and cryptographic operations and is immune to software-based attacks because it is often implemented in hardware. This secure cornerstone handles critical tasks such as secure boot, secure firmware updates, and cryptographic key management, ensuring that only authenticated code and communications are running on the device.</p><p dir="ltr">Adjacent to the Root of Trust is the role of Cryptography IP, which includes hardware-based cryptographic engines designed to perform encryption and decryption tasks. These cryptographic modules serve as the workhorses for data protection, enabling secure data storage and transmission, and are essential for functions like secure communications, digital signatures, and user authentication.</p><p dir="ltr">Both RoT and Cryptography IP are imperative for a secure boot process, which is the first step in a secure chain of events that occur when a device is powered on. During this process, the integrity and authenticity of the software stack are verified using cryptographic checks, establishing a secure execution environment from the outset.</p><p dir="ltr">To understand their importance, consider the analogy of a bank vault. In this analogy, RoT is the combination to the vault—highly confidential and used to validate the identity of individuals attempting to access the vault. Cryptography IP, on the other hand, is like the reinforced walls and time-locked doors—structural features that enforce security protocols and prevent unauthorized access.</p><p dir="ltr">These technologies also enable secure end-to-end communication, ensuring that data remains confidential and unaltered during transmission. With the proliferation of the Internet of Things (IoT) and connected devices, securing data in transit has become as crucial as securing it at rest.</p><p dir="ltr">Despite their robustness, the implementation of Root of Trust and Cryptography IP is not without challenges. Ensuring that these security measures themselves are impervious to exploitation requires meticulous design and regular updates in response to the evolving threat landscape. In the next section, we will examine the security challenges inherent in modern SoC designs and discuss how these foundational technologies can help mitigate those risks.</p><h1 dir="ltr">Securing the Core: Challenges in SoC Designs</h1><p dir="ltr">Modern Systems on Chip (SoCs) are marvels of integration, embedding processors, memory, I/O, and various other functionalities into a single chip. This consolidation brings vast benefits in terms of performance and power efficiency but also introduces a myriad of security challenges that must be navigated carefully.</p><p dir="ltr">One of the primary challenges is the increased attack surface. The very features that make SoCs powerful—connectivity, configurability, and smart functionalities—also make them more vulnerable to attacks. With more lines of code, there are more potential bugs or backdoors. With more interfaces, there are more points of entry for malicious actors.</p><p dir="ltr">Additionally, as SoCs become more complex, ensuring that every component is secure from design to decommission becomes harder. This complexity often results in a greater risk of side-channel attacks, where an attacker could infer sensitive information from power consumption, electromagnetic emissions, or even computation time.</p><p dir="ltr">Supply chain security presents another significant challenge. SoCs are global products, with materials and components sourced from and passing through multiple vendors and countries. Each step in this chain presents an opportunity for malicious actors to introduce vulnerabilities.</p><p dir="ltr">Moreover, the need for speed in markets means that security can sometimes be an afterthought, leading to vulnerabilities in the rush to get products to market. As a result, rigorous security testing and validation procedures are essential but can be overlooked or undervalued.</p><p dir="ltr">In dealing with these challenges, the industry has turned to a variety of mitigation strategies. One key approach is the concept of 'security by design', where security measures are considered at every step of the SoC design and manufacturing process. This approach includes using hardware-based security features, like those provided by secure enclaves and trusted execution environments, which can isolate sensitive operations from the main processor to protect them from software attacks.</p><p dir="ltr">Another strategy is regular security audits and updates. Even after an SoC is deployed, its security posture must be maintained and updated in response to new threats—much like how software is regularly patched.</p><p dir="ltr">Finally, leveraging advanced fabrication techniques and materials can reduce the physical vulnerabilities of SoCs, making them harder to tamper with or reverse engineer.</p><p dir="ltr">Navigating these challenges is a complex task, but it is one that is crucial for maintaining trust in technology. In the next section, we discuss how these strategies are put into practice, keeping SoCs secure against an ever-evolving array of threats.</p><h1 dir="ltr">Building Defenses: Mitigation Strategies for SoC Security</h1><p dir="ltr">To confront the security challenges in SoC designs, the semiconductor industry has developed a suite of mitigation strategies that bolster the defenses of these complex systems.</p><ul><li dir="ltr"><p dir="ltr"><strong>Secure Architectural Design:</strong> The first line of defense is secure architectural design. This includes the incorporation of hardware-based security features such as secure boot, trusted execution environments, and secure key storage. By integrating these elements at the design phase, SoCs are better equipped to handle unauthorized access attempts and ensure that critical operations remain uncompromised.</p></li><li dir="ltr"><p dir="ltr"><strong>Layered Security Approach:</strong> A layered security approach is critical for protecting against a wide range of potential attacks. This involves implementing multiple security layers that function together to protect the system. If one layer is breached, the subsequent layers provide an additional level of defense, making it more difficult for an attack to be successful.</p></li><li dir="ltr"><p dir="ltr"><strong>Dynamic Security Measures:&nbsp;</strong>Dynamic security measures, such as runtime monitoring and anomaly detection, are also key. These systems can detect and respond to suspicious behavior in real-time, providing a responsive layer of security that adapts to current threats.</p></li><li dir="ltr"><p dir="ltr"><strong>Encryption and Cryptography:&nbsp;</strong>Strong encryption and cryptography are indispensable in SoC security, safeguarding data both at rest and in transit. Advanced encryption standards and cryptographic algorithms are implemented to ensure that even if data is intercepted, it remains indecipherable without the appropriate keys.</p></li><li dir="ltr"><p dir="ltr"><strong>Regular Security Audits and Firmware Updates:&nbsp;</strong>Ongoing security audits and regular firmware updates ensure that security measures remain up-to-date in the face of evolving threats. This strategy includes the establishment of secure update mechanisms that prevent the installation of malicious firmware.</p></li><li dir="ltr"><p dir="ltr"><strong>Supply Chain Integrity:&nbsp;</strong>Protecting the integrity of the supply chain is another critical strategy. This involves measures such as secure manufacturing practices, tamper-evident packaging, and traceability of components to ensure that SoCs are not compromised at any point from fabrication to delivery.</p></li><li dir="ltr"><p dir="ltr"><strong>User Education and Access Control:</strong> Lastly, user education and strict access control policies are necessary to prevent inadvertent breaches. Users need to be aware of the security features of their devices and how to use them properly, while access control ensures that only authorized individuals can make changes to the system configuration or access sensitive information.</p></li></ul><p dir="ltr">By implementing these strategies, SoC designers and manufacturers can create more secure systems that are resilient in the face of both current and emerging security threats. However, the fast pace of technological change means that vigilance and continuous improvement are mandatory. Security is not a one-time achievement but an ongoing process of adaptation and reinforcement.</p><h1 dir="ltr">Conclusion</h1><p dir="ltr">Silicon-level security stands as a critical pillar in our digital era. Through exploring secure interface technologies, such as Root of Trust and Cryptography IP, we recognize their indispensable role in safeguarding modern SoCs. As we confront security challenges—from side-channel attacks to complex interface vulnerabilities—the need for a robust, multi-layered defense strategy becomes clear.</p><p dir="ltr">Securing silicon goes beyond a single solution—it's a continuous battle, balancing innovation with vigilance. As technology advances, so must our security strategies, integrating state-of-the-art features and adopting a culture of security-first in design and deployment.</p><p dir="ltr">The future hinges on our collective effort to ensure the trustworthiness of our digital foundations. In fostering this trust, the commitment to silicon-level security must remain unwavering, uniting stakeholders across the industry to fortify our digital landscape.</p><h1 dir="ltr">Synopsys' Impact on SoC Security</h1><p dir="ltr">In the realm of SoC security, <a href="https://www.synopsys.com/" target="_blank" rel="noopener noreferrer">Synopsys</a> offers critical technologies that sharpen the defenses of silicon interfaces. Their AI and Machine Learning tools not only expedite chip design but also imbue systems with smart threat detection, essential for anticipatory security. Their cloud solutions provide secure integrations essential for IoT devices dependent on cloud data management.</p><p dir="ltr">Their Design Technology Co-Optimization (DTCO) propels the creation of SoCs resistant to advanced threats by exploring new transistor architectures. Synopsys' emphasis on early-stage security integration through DevSecOps, alongside energy-efficient design practices, further strengthens SoCs against exploits like power analysis attacks.</p><p dir="ltr">Synopsys also pioneers in fortifying system integrity with its Multi-Die System solutions, safeguarding sensitive operations within SoCs. Their vigilance extends to software security, ensuring open-source components and software supply chains are robust against vulnerabilities from inception.</p><p dir="ltr">Through innovation and a strategic approach to security, Synopsys plays a pivotal role in the evolution of more secure digital infrastructures, demonstrating a comprehensive commitment to the advancement of SoC security.</p><h1 dir="ltr" id="isPasted">References</h1><p dir="ltr">[1] Dana Neustadter, Hezi Saar, Michael Posner, ‘How Security for SoC Interfaces Enhances Data Protection’, Synopsis, 4 Oct. 2022, [Online], Available from:&nbsp;<a href="https://www.synopsys.com/blogs/chip-design/soc-interfaces-security-enhance-data-protection.html" target="_blank">https://www.synopsys.com/blogs/chip-design/soc-interfaces-security-enhance-data-protection.html</a></p><p dir="ltr">[2] Marco Ciaffi, John Min, ‘Building security into an AI SoC using CPU features with extensions’, Embedded, 12 Apr. 2021, [Online], Available from:&nbsp;<a href="https://www.embedded.com/building-security-into-an-ai-soc-using-cpu-features-with-extensions/" target="_blank">https://www.embedded.com/building-security-into-an-ai-soc-using-cpu-features-with-extensions/</a></p><p dir="ltr">[3] Ruud Derwig, Nicole Fern, ‘Techniques for Ensuring Security in Processor-based SoCs’, Synopsis, [Online], Available from: <a href="https://www.synopsys.com/designware-ip/technical-bulletin/ensuring-security-processor-socs.html" target="_blank">https://www.synopsys.com/designware-ip/technical-bulletin/ensuring-security-processor-socs.html</a></p><p dir="ltr">[4] Landry J., ‘What Is Hardware Root of Trust?’, Dell, 22 July 2022, [Online], Available from: <a href="https://www.dell.com/en-us/blog/hardware-root-trust/" target="_blank" rel="noopener noreferrer">https://www.dell.com/en-us/blog/hardware-root-trust/</a></p>

Silicon-level security is crucial in protecting the hardware of computing devices, serving as a foundational layer for data integrity and system reliability in our increasingly digital world.


Silicon-Level Security: A Deep Dive into Secure Interfaces

<p id="isPasted">As information and communication technologies (ICT) process data, they convert electricity into heat. Already today, the global ICT ecosystem’s CO<sub>2</sub> footprint rivals that of aviation. It turns out, however, that a big part of the energy consumed by computer processors doesn’t go into performing calculations. Instead, the bulk of the energy used to process data is spent shuttling bytes between the memory to the processor.</p><p>In a <a href="https://dx.doi.org/10.1038/s41928-023-01064-1" target="_blank" rel="noopener">paper published</a> in the journal Nature Electronics, researchers from EPFL’s School of Engineering in the <a href="https://www.epfl.ch/labs/lanes/" target="_blank">Laboratory of Nanoscale Electronics and Structures (LANES)</a> present a new processor that tackles this inefficiency by integrating data processing and storage onto a single device, a so-called in-memory processor. They broke new ground by creating the first in-memory processor based on a two-dimensional semiconductor material to comprise more than 1000 transistors, a key milestone on the path to industrial production.</p><h2><strong>Von Neuman’s legacy</strong></h2><p>According to Andras Kis, who led the study, the main culprit behind the inefficiency of today’s CPUs is the universally adopted von Neumann architecture. Specifically, the physical separation of the components used to perform calculations and to store data. Because of this separation, processors need to retrieve data from the memory to perform calculations, which involves moving electrical charges, charging and discharging capacitors, and transmitting currents along lines – all of which dissipate energy.</p><p>Until around 20 years ago, this architecture made sense, as different types of devices were required for data storage and processing. But the von Neumann architecture is increasingly being challenged by more efficient alternatives. “Today, there are ongoing efforts to merge storage and processing into a more universal in-memory processors that contain elements which work both as a memory and as a transistor,” Kis explains. His lab has been exploring ways to achieve this goal using molybdenum disulfide (MoS<sub>2</sub>), a semiconductor material.</p><h2><strong>A new two-dimensional processor architecture</strong></h2><p>In their Nature Electronics paper, Guilherme Migliato Marega, doctoral assistant at LANES, and his co-authors present an MoS<sub>2</sub>-based in-memory processor dedicated to one of the fundamental operations in data processing: vector-matrix multiplication. This operation is ubiquitous in digital signal processing and the implementation of artificial intelligence models. Improvements in its efficiency could yield substantial energy savings throughout the entire ICT sector.</p><p>Their processor combines 1024 elements onto a one-by-one-centimeter chip. Each element comprises a 2D MoS<sub>2</sub>transistor as well as a floating gate, used to store a charge in its memory that controls the conductivity of each transistor. Coupling processing and memory in this way fundamentally changes how the processor carries out the calculation. “By setting the conductivity of each transistor, we can perform analog vector-matrix multiplication in a single step by applying voltages to our processor and measuring the output,” explains Kis.</p><h2><strong>A big step closer to practical applications</strong></h2><p>The choice of material – MoS<sub>2</sub> – played a vital role in the development of their in-memory processor. For one, MoS<sub>2</sub> is a semiconductor – a requirement for the development of transistors. Unlike silicon, the most widely used semiconductor in today’s computer processors, MoS<sub>2</sub> forms a stable monolayer, just three atoms thick, that only interacts weakly with its surroundings. Its thinness offers the potential to produce extremely compact devices. Finally, it’s a material that Kis’s lab knows well. In 2010, they created their first single MoS<sub>2</sub> transistor using a monolayer of the material peeled off a crystal using Scotch tape.</p><p>Over the past 13 years, their processes have matured substantially, with Migliato Marega’s contributions playing a key role. “The key advance in going from a single transistor to over 1000 was the quality of the material that we can deposit. After a lot of process optimization, we can now produce entire wafers covered with a homogenous layer of uniform MoS<sub>2</sub>. This lets us adopt industry standard tools to design integrated circuits on a computer and translate these designs into physical circuits, opening the door to mass production,” says Kis.</p><h2><strong>Revitalizing European chip manufacturing</strong></h2><p>Aside from its purely scientific value, Kis sees this result as a testament to the importance of close scientific collaboration between Switzerland and the EU, in particular in the context of the European Chips Act, which aims to bolster Europe’s competitiveness and resilience in semiconductor technologies and applications. “EU funding was crucial for both this project and those that preceded it, including the one that financed the work on the first MoS2 transistor, showing just how important it is for Switzerland,” says Kis.</p><p>“At the same time, it shows how work carried out in Switzerland can benefit the EU as it seeks to reinvigorate electronics fabrication. Rather than running the same race as everyone else, the EU could, for example, focus on developing non-von Neumann processing architectures for AI accelerators and other emerging applications. By defining its own race, the continent could get a head start to secure a strong position in the future,” he concludes.</p><hr><p><strong id="isPasted">References</strong></p><p>Marega, G. M., Ji, H. G., Wang, Z., Pasquale, G., Tripathi, M., Radenovic, A., &amp; Kis, A. (2023). Large-Scale Integrated Vector-Matrix Multiplication Processor Based on Monolayer MoS2. Nature Electronics. DOI: <a href="https://dx.doi.org/10.1038/s41928-023-01064-1" target="_blank" rel="noopener">http://dx.doi.org/10.1038/s41928-023-01064-1</a></p>

Developed by EPFL researchers, the first large-scale in-memory processor using 2D semiconductor materials could substantially cut the ICT sector’s energy footprint.

Redefining energy efficiency in data processing

<p id="isPasted">The semiconductor industry can be described in many ways. Ingenious, impactful, and unpredictable are three descriptors that come to mind. &nbsp;There are many more, but one word that doesn’t apply here is boring. In the 1960s, the late Gordon Moore advanced the insightful observation that chip complexity would follow an exponential path. His now-famous Moore’s law charted the course for the semiconductor industry for over 50 years.</p><p>The exponential effects predicted by <a href="https://www.synopsys.com/glossary/what-is-moores-law.html" target="_blank">Moore’s law</a> have profoundly impacted the semiconductor industry, all the industries that use semiconductors, and the world at large.&nbsp;</p><p>Back in 2015, when Moore’s law turned 50, <a href="https://www.scientificamerican.com/article/moore-s-law-keeps-going-defying-expectations/" target="_blank">Scientific American published an article on the longevity and impact of Gordon Moore’s prediction</a>. In that article, the exponential effects of Moore’s law were applied to the automotive industry. The article pointed out:</p><p><em>If a 1971 Volkswagen Beetle had advanced at the pace of Moore’s law over the past 34 years, today “you would be able to go with that car 300,000 miles per hour. You would get two million miles per gallon of gas for the mere cost of four cents.”</em></p><p>If only Moore’s law could continue forever. But alas, nothing lasts forever. In recent times, Moore’s law has begun to slow down. It’s still predicting (and delivering) semiconductor advances, but it takes more time and money to arrive at those advances, and once there, the benefits aren’t as great as they used to be.</p><p>Innovation will not be slowed, especially in the semiconductor industry. So, something else must be added to keep things moving at the customary exponential pace. That something else is multi-die systems. Read on to get an industry-wide look at the move toward multi-die systems.</p><section id="isPasted"><h2>The World According to MIT Technology Review Insights</h2><p id="isPasted">MIT Technology Review Insights (<a href="https://www.technologyreview.com/?utm_medium=bing&msclkid=fe0081936d391c114f1be58c586ec489" target="_blank">MITTRI</a>) is the custom publishing division of MIT Technology Review, the longest-running technology magazine. MITTRI has been part of the Massachusetts Institute of Technology (MIT) for over 100 years.&nbsp;</p><p>This organization is famous for its quality research and Synopsys was excited to sponsor a research piece on the move to multi-die systems. Titled <a href="https://www.technologyreview.com/2023/03/31/1070527/multi-die-systems-define-the-future-of-semiconductors/" target="_blank">Multi-die Systems Define the Future of Semiconductors</a>, the report explores the forces that demand a new method of design, one that is not solely reliant on the exponential scaling predicted by Moore’s law. The reasons for that change, the challenges to implementing it, and the benefits awaiting the semiconductor industry and the world are all discussed.&nbsp;</p></section><section><h2>Multi-Die Systems Report Methodology</h2><p>The report was driven by three research methods:</p><ul><li>Independent market research</li><li>A poll of the MIT Technology Review Global Insights Panel, including executives from diverse industries</li><li>Interviews with semiconductor industry experts</li></ul><p>The poll drew from over 300 responses representing more than 12 industries across the globe. About half the responses came from C-suite executives or directors. The distribution of company sizes and geographic location is shown in the figure below.</p><p><span class="fr-img-caption fr-fic fr-dib" style="width: 768px;"><span class="fr-img-wrap"><img src="https://images.wevolver.com/eyJidWNrZXQiOiJ3ZXZvbHZlci1wcm9qZWN0LWltYWdlcyIsImtleSI6ImZyb2FsYS8xNjk5OTg4MTY2ODM5LW11bHRpLWRpZS1wb2xsLndlYnAiLCJlZGl0cyI6eyJyZXNpemUiOnsid2lkdGgiOjk1MCwiZml0IjoiY292ZXIifX19" style="width: 766px;" class="fr-fic fr-dib"><span class="fr-inner" spellcheck="false">Survey respondent's statistics.</span></span></span></p><section id="isPasted"><p>There were many interesting and informative insights because of this poll. One clear statistic that illustrates the move to multi-die systems: 38% of firms polled are looking at multi-die systems for future products. The movement is real and it’s happening now.</p><p>The third part of the report, the interviews with industry leaders, reveals some telling insights about where the industry is currently and where it needs to go. These passages represent a great opportunity to hear directly from those driving next-generation products to understand their direction, care-abouts, and future aspirations.</p><p>The panel of experts consisted of:</p><ul><li>Uri Frank, Vice President of Engineering, <a href="https://about.google/" target="_blank">Google&nbsp;</a></li><li>Sassine Ghazi, President and Chief Operating Officer, <a href="https://www.synopsys.com/" target="_blank">Synopsys&nbsp;</a></li><li>Patrick Moorhead, Founder, CEO, and Chief Analyst, <a href="https://moorinsightsstrategy.com/" target="_blank">Moor Insights &amp; Strategy&nbsp;</a></li><li>François Piednoël, distinguished chief mSoC architect, <a href="https://mbrdna.com/" target="_blank">Mercedes-Benz Research &amp; Development North America&nbsp;</a></li><li>Gerry Talbot, corporate fellow, <a href="https://www.amd.com/en.html" target="_blank">AMD&nbsp;</a></li><li>Kevin Zhang, senior vice president of Business Development, <a href="https://www.tsmc.com/english" target="_blank">TSMC&nbsp;</a></li></ul><p>Assembling a panel of experts like this is no small feat. It’s a testament to the power of the MIT brand and the importance of the trend.</p></section><section><h2>Learn More About Multi-Die Systems</h2><p>Synopsys is committed to working with our ecosystem partners and ushering in a new era of multi-die systems. We are bringing a comprehensive multi-die system solution, including EDA and IP products and deep system design expertise, to the task and we can’t wait to see where these new capabilities will take us.</p><p>Get an industry-wide look at the move toward multi-die systems:&nbsp;</p><p><a href="https://www.synopsys.com/content/dam/synopsys/solutions/multi-die/white-papers/MITTRI.pdf" target="_blank" data-lf-fd-inspected-kn9eq4roawkarlvp="true">Access your copy of the new MITTRI report here</a>.</p></section></section>

A report explores the forces that demand a new method of design, one that is not solely reliant on the exponential scaling predicted by Moore’s law.

Discovering the Future of Multi-Die Systems

A typical circuit board with components and wiring traces

From Blueprint to Functionality: Navigating the Intricacies of Circuit Boards – Manufacturing, Mechanics, and Troubleshooting Demystified

How Do Circuit Boards Work: A Comprehensive Guide to the Heart of Electronics

With a groundbreaking open-source architecture, RISC-V is paving the way for a new era of computing technology. In this article, we’ll delve into RISC-V’s evolution, its underlying principles and technical aspects, as well as its limitations and future prospects.

Understanding RISC-V: The Open Standard Instruction Set Architecture

<section id="isPasted"><p>Mil-Spec, an abbreviation for ‘military specification’’ or military spec, outlines the rigorous standards the U.S. Department of Defense (DoD) sets to describe the physical and functional requirements for products and systems it purchases. The term mil-spec simply means that something has met military standards. It is similar to mil-STD and can be used in the same way.</p><p>Within the realm of PCB assemblies, Mil-Spec denotes a certification, indicating that a PCB design has met the exacting requirements established by the military for quality, durability, and performance. PCBAs are thus guaranteed to meet defense specifications and hold up in harsh environments.</p><p>While Mil-Spec standards for PCBAs accommodate commercial PCBA manufacturing techniques, the primary objective remains uncompromised: ensuring PCBAs can withstand the demanding conditions of military operations.</p><p>This article will guide you through standards relevant to Mil-Spec PCB assemblies, compare the unique attributes of military-grade PCBAs with other PCB assembly classes, outline essential design principles for these high-performing boards, and highlight the critical testing areas required for Mil-Spec certifications.</p><h2><p>Understanding Mil-Spec</p></h2><p>Mil-Specs are stringent standards pivotal to the U.S. defense procurement process, ensuring that every piece of military equipment, from fighter jets to printed circuit board assemblies, functions reliably under high-stakes conditions.</p><p>Mil-specs are standardized documents. Standardization ensures equipment from different manufacturers is interoperable, and that replacement parts are consistent and dependable. This is especially important given the global scope of military operations and the need for reliable, predictable tools in various environments.</p><p>Though initially developed for military applications, Mil-Spec components and assemblies are not unique to the military and may be used in other high-stakes industries such as aerospace and medicine. Many companies in these sectors now opt for using components from the Mil-Spec Qualified Product List (QPL) and also choose to work with certified manufacturers on the Mil-Spec Quality Manufacturer List (QML).</p><h2><p>Military Specifications Applicable to PCBAs</p></h2><p>Here, we delve into some of the most commonly cited Mil-specs for military-grade PCBs and what they entail:</p><a href="https://www.macrofab.com/blog/understanding-and-implementing-mil-spec-standards-in-pcb-assemblies/#" title="click to enlarge" target="_blank"><img src="https://images.wevolver.com/eyJidWNrZXQiOiJ3ZXZvbHZlci1wcm9qZWN0LWltYWdlcyIsImtleSI6ImZyb2FsYS8xNjk5ODg2MjE5NjQ5LTE2OTk4ODYyMTk2NDkucG5nIiwiZWRpdHMiOnsicmVzaXplIjp7IndpZHRoIjo5NTAsImZpdCI6ImNvdmVyIn19fQ==" alt="Mil spec standards table" class="fr-fic fr-dii"></a><h2><p>Difference Between IPC Class 3 PCBs and Others</p></h2><img src="https://images.wevolver.com/eyJidWNrZXQiOiJ3ZXZvbHZlci1wcm9qZWN0LWltYWdlcyIsImtleSI6ImZyb2FsYS8xNjk5ODg2MjE5NzE5LTE2OTk4ODYyMTk3MTkucG5nIiwiZWRpdHMiOnsicmVzaXplIjp7IndpZHRoIjo5NTAsImZpdCI6ImNvdmVyIn19fQ==" alt="Magnified pcba" class="fr-fic fr-dii"><p>IPC—formerly known as the Institute of Printed Circuits—is a global trade association serving the printed board and electronics assembly industries. IPC classifies PCBs into three main categories based on their reliability and the quality assurance processes they must undergo:</p><h3>IPC Class 1: Commercial Grade</h3><p>IPC Class 1 is geared towards consumer electronics and products where cost is a significant factor. These PCBs undergo basic quality control tests and are designed for general use under standard conditions. They typically have a shorter lifespan and are<br>not built for high-stress environments.</p><h3>IPC Class 2: Industrial Grade</h3><p>If your project needs something more robust—maybe for industrial or some medical applications—you’ll be looking at IPC Class 2 PCBs. You get more extensive quality testing with these, and they’re built to last longer than Class 1.</p><h3>IPC Class 3: Military Grade</h3><p>If your application is mission-critical, like military or aerospace use, where a failure could be catastrophic, you’ll need IPC Class 3 PCBs. These are the best of the best. They undergo the most stringent quality tests and are engineered to work in the harshest, most demanding environments. They’re what you choose when reliability and performance can’t be compromised.</p><p>Prior to assembly, the bare board must meet or exceed the desired post-assembly class. To put it another way, you cannot create a Class 3 PCB assembly from a Class 2 board.</p><p>Quality processes, cleanliness standards, and defect reduction are all key to determining IPC assembly classes. To ensure they can withstand harsh conditions, Class 3 assemblies go through rigorous testing and inspection processes.</p><h2><p>Key Design Considerations for Mil-Spec PCBAs</p></h2><p>When designing or procuring PCBAs that comply with military specifications, there are a number of vital considerations to keep in mind:</p><ul><li>Ensure full compliance with relevant military specifications.</li><li>Ensure trace widths and materials can handle high currents.</li><li>Separate high-frequency and low-frequency components to minimize noise interference.</li><li>Shield and isolate clock signals to prevent interference.</li><li>Route traces at angles of 45° or less for better signal integrity.</li><li>Incorporate heat sinks, thermal vias, and layouts that promote efficient heat dissipation due to possible drastic temperature shifts.</li><li>Use protective coatings or encapsulation to shield against factors like moisture, salt spray, and chemicals.</li><li>Mil-Spec PCBAs require the use of high-quality materials and components to ensure they can withstand extreme conditions such as high temperatures, moisture, and mechanical stress.</li></ul><h2><p>Testing Mil-Spec PCBAs</p></h2><img src="https://images.wevolver.com/eyJidWNrZXQiOiJ3ZXZvbHZlci1wcm9qZWN0LWltYWdlcyIsImtleSI6ImZyb2FsYS8xNjk5ODg2MjE5ODQ2LTE2OTk4ODYyMTk4NDYucG5nIiwiZWRpdHMiOnsicmVzaXplIjp7IndpZHRoIjo5NTAsImZpdCI6ImNvdmVyIn19fQ==" alt="The word tested on green circuit board" class="fr-fic fr-dii"><p>To ensure compliance with relevant requirements, military-grade PCBs undergo a battery of tests. Knowing these test areas can guide PCBA designers to focus on key aspects that are crucial for the assembly to meet military standards. The primary test areas are as follows:</p><h3>Chemical Tests</h3><p>Chemical tests ascertain the cleanliness and specific characteristics of the materials used, such as the plating. Under this, we have:</p><ul><li><strong>Ionic Contamination:&nbsp;</strong>Assemblies are tested for levels of ionic contamination. For instance, the MIL-PRF-31032 requires that the ionic contamination must not exceed 1.56 micrograms/square centimeter prior to the application of a solder mask.</li><li><strong>Copper Plating Characteristics:</strong> Elongation and tensile strength of copper plating are tested and must meet minimum standards of the relevant MIL-Spec.</li></ul><h3>Physical Tests</h3><p>Physical tests are conducted to evaluate the integrity of the PCBA in terms of adhesion and structural stability. Under this, we have:</p><ul><li><strong>Adhesion Marking:</strong> Tests look for missing or smeared markings, any of which would constitute a failure.</li><li><strong>Adhesion, Plating:</strong> These tests ensure no part of the conductor pattern or copper plating is removed.</li><li><strong>Adhesion, Solder Mask:</strong> Criteria are set for the maximum percentage of solder mask that can lift from the board’s surface.</li><li><strong>Bow and Twist:&nbsp;</strong>The extent of any deformity in the printed boards is measured.</li><li><strong>Rework Simulation:</strong> This test ensures printed boards still meet specifications after simulated rework processes.</li><li><strong>Solderability:</strong> Boards requiring soldering during assembly processes are tested for solderability, depending on their design.</li><li><strong>Surface Peel Strength:</strong> It measures the peel strength of surface conductors, ensuring they meet specific standards.</li></ul><img src="https://images.wevolver.com/eyJidWNrZXQiOiJ3ZXZvbHZlci1wcm9qZWN0LWltYWdlcyIsImtleSI6ImZyb2FsYS8xNjk5ODg2MjE5ODk3LTE2OTk4ODYyMTk4OTcucG5nIiwiZWRpdHMiOnsicmVzaXplIjp7IndpZHRoIjo5NTAsImZpdCI6ImNvdmVyIn19fQ==" alt="Digital visualization of close up pcba blue" class="fr-fic fr-dii"><h3>Electrical Tests</h3><p>Electrical tests focus on ensuring proper conduction and insulation within the PCBA. Under this, we have:</p><ul><li><strong>Continuity:</strong> Checks the resistance between end-points of conductor patterns, ensuring no resistance limits are exceeded.</li><li><strong>Isolation:</strong> Tests are conducted to measure insulation resistance between mutually isolated conductors</li></ul><img src="https://images.wevolver.com/eyJidWNrZXQiOiJ3ZXZvbHZlci1wcm9qZWN0LWltYWdlcyIsImtleSI6ImZyb2FsYS8xNjk5ODg2MjE5OTUyLTE2OTk4ODYyMTk5NTIucG5nIiwiZWRpdHMiOnsicmVzaXplIjp7IndpZHRoIjo5NTAsImZpdCI6ImNvdmVyIn19fQ==" alt="Digital visualization of close up pcba green" class="fr-fic fr-dii"><h3>Environmental Test Methods</h3><p>Environmental tests evaluate the PCBA’s resilience against environmental stressors like moisture and heat. Under this, we have:</p><ul><li><strong>Moisture and Insulation Resistance:</strong> These tests demonstrate that PCBAs perform well under humid conditions.</li><li><strong>Resistance to Soldering Heat:</strong> These tests assess the board’s ability to withstand thermal stress during soldering processes</li></ul><h2><p>Conclusion</p></h2><p>The design and manufacturing of military-grade PCBs demand strict adherence to a set of rigorous standards. These standards govern everything from the quality of materials used to the thermal management systems in place, and they serve to ensure the ultimate reliability and safety of electronic components in critical military applications.</p><p>Moreover, an understanding of the basic tests mandated by military specifications can significantly guide the design process.</p><p>As the landscape of technology evolves, staying up-to-date with MIL-Spec standards is vital to ensure ongoing excellence in both compliance and performance.</p><h4>Flexibility Matters. Get It With MacroFab.</h4><a href="https://www.macrofab.com/rfq/" target="_blank">GET A QUOTE TODAY</a></section><section><h4><br></h4></section>

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