A deep dive into the world of transistors and their application in modern electronics.

Understanding Transistors: What They Are and How They Work

Printed Circuit Board with Surface Mounted Devices

This article delves into the various types of SMD components, detailing their sizes, functions, soldering techniques, selection guidelines, and applications.

Types of SMD Components: A Comprehensive Guide

This article was first published on <a href="https://news.mit.edu/2023/mit-engineers-2d-materials-computer-chips-0427" id="isPasted" rel="noopener noreferrer" target="_blank">MIT News</a>. &nbsp;&nbsp;<hr>Emerging AI applications, like chatbots that generate natural human language, demand denser, more powerful computer chips. But semiconductor chips are traditionally made with bulk materials, which are boxy 3D structures, so stacking multiple layers of transistors to create denser integrations is very difficult.However, semiconductor transistors made from ultrathin 2D materials, each only about three atoms in thickness, could be stacked up to create more powerful chips. To this end, MIT researchers have now demonstrated a novel technology that can effectively and efficiently &ldquo;grow&rdquo; layers of 2D transition metal dichalcogenide (TMD) materials directly on top of a fully fabricated silicon chip to enable denser integrations.Growing 2D materials directly onto a silicon CMOS wafer has posed a major challenge because the process usually requires temperatures of about 600 degrees Celsius, while silicon transistors and circuits could break down when heated above 400 degrees. Now, the interdisciplinary team of MIT researchers has developed a low-temperature growth process that does not damage the chip. The technology allows 2D semiconductor transistors to be directly integrated on top of standard silicon circuits.In the past, researchers have grown 2D materials elsewhere and then transferred them onto a chip or a wafer. This often causes imperfections that hamper the performance of the final devices and circuits. Also, transferring the material smoothly becomes extremely difficult at wafer-scale. By contrast, this new process grows a smooth, highly uniform layer across an entire 8-inch wafer.The new technology is also able to significantly reduce the time it takes to grow these materials. While previous approaches required more than a day to grow a single layer of 2D materials, the new approach can grow a uniform layer of TMD material in less than an hour over entire 8-inch wafers.Due to its rapid speed and high uniformity, the new technology enabled the researchers to successfully integrate a 2D material layer onto much larger surfaces than has been previously demonstrated. This makes their method better-suited for use in commercial applications, where wafers that are 8 inches or larger are key.&ldquo;Using 2D materials is a powerful way to increase the density of an integrated circuit. What we are doing is like constructing a multistory building. If you have only one floor, which is the conventional case, it won&rsquo;t hold many people. But with more floors, the building will hold more people that can enable amazing new things. Thanks to the heterogenous integration we are working on, we have silicon as the first floor and then we can have many floors of 2D materials directly integrated on top,&rdquo; says Jiadi Zhu, an electrical engineering and computer science graduate student and co-lead author of a&nbsp;<a href="https://www.nature.com/articles/s41565-023-01375-6" target="_blank">paper</a> on this new technique.Zhu wrote the paper with co-lead-author Ji-Hoon Park, an MIT postdoc; corresponding authors Jing Kong, professor of electrical engineering and computer science (EECS) and a member of the Research Laboratory for Electronics; and Tom&aacute;s Palacios, professor of EECS and director of the Microsystems Technology Laboratories (MTL); as well as others at MIT, MIT Lincoln Laboratory, Oak Ridge National Laboratory, and Ericsson Research. The paper appears today in&nbsp;Nature Nanotechnology.<h2>Slim materials with vast potential</h2>The 2D material the researchers focused on, molybdenum disulfide, is flexible, transparent, and exhibits powerful electronic and photonic properties that make it ideal for a semiconductor transistor. It is composed of a one-atom layer of molybdenum sandwiched between two atoms of sulfide.Growing thin films of molybdenum disulfide on a surface with good uniformity is often accomplished through a process known as&nbsp;<a href="https://news.mit.edu/2015/explained-chemical-vapor-deposition-0619" target="_blank">metal-organic chemical vapor deposition</a> (MOCVD). Molybdenum hexacarbonyl and diethylene sulfur, two organic chemical compounds that contain molybdenum and sulfur atoms, vaporize and are heated inside the reaction chamber, where they &ldquo;decompose&rdquo; into smaller molecules. Then they link up through chemical reactions to form chains of molybdenum disulfide on a surface.But decomposing these molybdenum and sulfur compounds, which are known as precursors, requires temperatures above 550 degrees Celsius, while silicon circuits start to degrade when temperatures surpass 400 degrees.So, the researchers started by thinking outside the box &mdash; they designed and built an entirely new furnace for the metal-organic chemical vapor deposition process.The oven consists of two chambers, a low-temperature region in the front, where the silicon wafer is placed, and a high-temperature region in the back. Vaporized molybdenum and sulfur precursors are pumped into the furnace. The molybdenum stays in the low-temperature region, where the temperature is kept below 400 degrees Celsius &mdash; hot enough to decompose the molybdenum precursor but not so hot that it damages the silicon chip.The sulfur precursor flows through into the high-temperature region, where it decomposes. Then it flows back into the low-temperature region, where the chemical reaction to grow molybdenum disulfide on the surface of the wafer occurs.&ldquo;You can think about decomposition like making black pepper &mdash; you have a whole peppercorn and you grind it into a powder form. So, we smash and grind the pepper in the high-temperature region, then the powder flows back into the low-temperature region,&rdquo; Zhu explains.<h2>Faster growth and better uniformity</h2>One problem with this process is that silicon circuits typically have aluminum or copper as a top layer so the chip can be connected to a package or carrier before it is mounted onto a printed circuit board. But sulfur causes these metals to sulfurize, the same way some metals rust when exposed to oxygen, which destroys their conductivity. The researchers prevented sulfurization by first depositing a very thin layer of passivation material on top of the chip. Then later they could open the passivation layer to make connections.They also placed the silicon wafer into the low-temperature region of the furnace vertically, rather than horizontally. By placing it vertically, neither end is too close to the high-temperature region, so no part of the wafer is damaged by the heat. Plus, the molybdenum and sulfur gas molecules swirl around as they bump into the vertical chip, rather than flowing over a horizontal surface. This circulation effect improves the growth of molybdenum disulfide and leads to better material uniformity.In addition to yielding a more uniform layer, their method was also much faster than other MOCVD processes. They could grow a layer in less than an hour, while typically the MOCVD growth process takes at least an entire day.Using the state-of-the-art&nbsp;<a href="https://mitnano.mit.edu/" target="_blank">MIT.Nano</a> facilities, they were able to demonstrate high material uniformity and quality across an 8-inch silicon wafer, which is especially important for industrial applications where bigger wafers are needed.&ldquo;By shortening the growth time, the process is much more efficient and could be more easily integrated into industrial fabrications. Plus, this is a silicon-compatible low-temperature process, which can be useful to push 2D materials further into the semiconductor industry,&rdquo; Zhu says.In the future, the researchers want to fine-tune their technique and use it to grow many stacked layers of 2D transistors. In addition, they want to explore the use of the low-temperature growth process for flexible surfaces, like polymers, textiles, or even papers. This could enable the integration of semiconductors onto everyday objects like clothing or notebooks.&ldquo;This work made an important progress in the synthesis technology of monolayer molybdenum disulfide material,&rdquo; says Han Wang, the Robert G. and Mary G. Lane Endowed Early Career Chair and Associate Professor of Electrical and Computer Engineering and Chemical Engineering and Materials Science at the University of Southern California, who was not involved with this research. &ldquo;The new capability of low thermal budget growth on an 8-inch scale enables the back-end-of-line integration of this material with silicon CMOS technology and paves the way for its future electronics application.&rdquo;This work is partially funded by the MIT Institute for Soldier Nanotechnologies, the National Science Foundation Center for Integrated Quantum Materials, Ericsson, MITRE, the U.S. Army Research Office, and the U.S. Department of Energy. The project also benefitted from the support of TSMC University Shuttle.<hr>&quot;Reprinted with permission of&nbsp;<a href="https://news.mit.edu/2023/mit-engineers-2d-materials-computer-chips-0427" id="isPasted" rel="noopener noreferrer" target="_blank">MIT News</a>&quot; &nbsp;

Graduate student Jiadi Zhu holding an 8-inch CMOS wafer with molybdenum disulfide thin film. On the right is the furnace the researchers developed, which enabled them to "grow" a layer of molybdenum disulfide onto the wafer using a low-temperature process that did not damage the wafer. Image: Courtesy of the researchers

A new low-temperature growth and fabrication technology allows the integration of 2D materials directly onto a silicon circuit, which could lead to denser and more powerful chips.

Engineers "grow" atomically thin transistors on top of computer chips

This guide will walk you through the basics of digital design, delve into the intricacies of RTL design, and cover essential concepts such as RTL coding, synthesis, RTL for synchronous and asynchronous design, simulation and verification.

RTL Design: A Comprehensive Guide to Unlocking the Power of Register-Transfer Level Design

Until now, the ability to make electronic devices faster has come down to a simple principle: scaling down transistors and other components. But this approach is reaching its limit, as the benefits of shrinking are counterbalanced by detrimental effects like resistance and decreased output power.Elison Matioli of the Power and Wide-band-gap Electronics Research Lab (<a href="https://www.epfl.ch/labs/powerlab/" target="_blank">POWERlab</a>) in EPFL&rsquo;s School of Engineering explains that further miniaturization is therefore not a viable solution to better electronics performance. &ldquo;New papers come out describing smaller and smaller devices, but in the case of materials made from gallium nitride, the best devices in terms of frequency were already published a few years back,&rdquo; he says. &ldquo;After that, there is really nothing better, because as device size is reduced, we face fundamental limitations. This is true regardless of the material used.&rdquo;In response to this challenge, Matioli and PhD student Mohammad Samizadeh Nikoo came up with a new approach to electronics that could overcome these limitations and enable a new class of terahertz devices. Instead of shrinking their device, they rearranged it, notably by etching patterned contacts called metastructures at sub-wavelength distances onto a semiconductor made of gallium nitride and indium gallium nitride. These metastructures allow the electrical fields inside the device to be controlled, yielding extraordinary properties that do not occur in nature.Crucially, the device can operate at electromagnetic frequencies in the terahertz range (between 0.3-30 THz) &ndash; significantly faster than the gigahertz waves used in today&rsquo;s electronics. They can therefore carry much greater quantities of information for a given signal or period, giving them great potential for applications in 6G communications and beyond.&ldquo;We found that manipulating radiofrequency fields at microscopic scales can significantly boost the performance of electronic devices, without relying on aggressive downscaling,&rdquo; explains Samizadeh Nikoo, who is the first author of an article on the breakthrough recently&nbsp;<a href="https://www.nature.com/articles/s41586-022-05595-z" rel="noopener" target="_blank">published</a> in the journal&nbsp;Nature.<h2>Record high frequencies, record low resistance</h2>Because terahertz frequencies are too fast for current electronics to manage, and too slow for optics applications, this range is often referred to as the &lsquo;terahertz gap&rsquo;. Using sub-wavelength metastructures to modulate terahertz waves is a technique that comes from the world of optics. But the POWERlab&rsquo;s method allows for an unprecedented degree of electronic control, unlike the optics approach of shining an external beam of light onto an existing pattern.&ldquo;In our electronics-based approach, the ability to control induced radiofrequencies comes from the combination of the sub-wavelength patterned contacts, plus the control of the electronic channel with applied voltage. This means that we can change the collective effect inside the metadevice by inducing electrons (or not),&rdquo; says Matioli.While the most advanced devices on the market today can achieve frequencies of up to 2 THz, the POWERlab&rsquo;s metadevices can reach 20 THz. Similarly, today&rsquo;s devices operating near the terahertz range tend to break down at voltages below 2 volts, while the metadevices can support over 20 volts. This enables the transmission and modulation of terahertz signals with much greater power and frequency than is currently possible.<h2>Integrated solutions</h2>As Samizadeh Nikoo explains, modulating terahertz waves is crucial for the future of telecommunications, as the increasing data requirements of technologies like autonomous vehicles and 6G mobile communications are fast reaching the limits of today&rsquo;s devices. The electronic metadevices developed in the POWERlab could form the basis for integrated terahertz electronics by producing compact, high-frequency chips that can already be used with smartphones, for example.&ldquo;This new technology could change the future of ultra-high-speed communications, as it is compatible with existing processes in semiconductor manufacturing. We have demonstrated data transmission of up to 100 gigabits per second at terahertz frequencies, which is already 10 times higher than what we have today with 5G,&rdquo; Samizadeh Nikoo says. To fully realize the potential of the approach, Matioli says the next step is to develop other electronics components ready for integration into terahertz circuits.&ldquo;Integrated terahertz electronics are the next frontier for a connected future. But our electronic metadevices are just one component. We need to develop other integrated terahertz components to fully realize the potential of this technology. That is our vision and goal.&rdquo;<hr>ReferencesSamizadeh Nikoo, M., Matioli, E. Electronic metadevices for terahertz applications. Nature 614, 451&ndash;455 (2023).&nbsp;<a href="https://www.nature.com/articles/s41586-022-05595-z" rel="noopener" target="_blank">https://doi.org/10.1038/s41586-022-05595-z</a>

EPFL researchers have come up with a new approach to electronics that involves engineering metastructures at the sub-wavelength scale. It could launch the next generation of ultra-fast devices for exchanging massive amounts of data, with applications in 6G communications and beyond.

Electronic metadevices break barriers to ultra-fast communications

This article was first published on&nbsp;<a href="https://news.mit.edu/2023/2d-atom-thin-industrial-silicon-wafers-0118" id="isPasted" rel="noopener noreferrer" target="_blank">MIT News</a>. &nbsp;<hr>True to Moore&rsquo;s Law, the number of transistors on a microchip has doubled every year since the 1960s. But this trajectory is predicted to soon plateau because silicon &mdash; the backbone of modern transistors &mdash; loses its electrical properties once devices made from this material dip below a certain size.Enter 2D materials &mdash; delicate, two-dimensional sheets of perfect crystals that are as thin as a single atom. At the scale of nanometers, 2D materials can conduct electrons far more efficiently than silicon. The search for next-generation transistor materials therefore has focused on 2D materials as potential successors to silicon.But before the electronics industry can transition to 2D materials, scientists have to first find a way to engineer the materials on industry-standard silicon wafers while preserving their perfect crystalline form. And MIT engineers may now have a solution.The team has developed a method that could enable chip manufacturers to fabricate ever-smaller transistors from 2D materials by growing them on existing wafers of silicon and other materials. The new method is a form of &ldquo;nonepitaxial, single-crystalline growth,&rdquo; which the team used for the first time to grow pure, defect-free 2D materials onto industrial silicon wafers.With their method, the team fabricated a simple functional transistor from a type of 2D materials called transition-metal dichalcogenides, or TMDs, which are known to conduct electricity better than silicon at nanometer scales.&ldquo;We expect our technology could enable the development of 2D semiconductor-based, high-performance, next-generation electronic devices,&rdquo; says Jeehwan Kim, associate professor of mechanical engineering at MIT. &ldquo;We&rsquo;ve unlocked a way to catch up to Moore&rsquo;s Law using 2D materials.&rdquo;Kim and his colleagues detail their method in a&nbsp;<a href="https://www.nature.com/articles/s41586-022-05524-0" target="_blank">paper</a> appearing today in&nbsp;Nature. The study&rsquo;s MIT co-authors include Ki Seok Kim, Doyoon Lee, Celesta Chang, Seunghwan Seo, Hyunseok Kim, Jiho Shin, Sangho Lee, Jun Min Suh, and Bo-In Park, along with collaborators at the University of Texas at Dallas, the University of California at Riverside, Washington University in Saint Louis, and institutions across South Korea.<h2>A crystal patchwork</h2>To produce a 2D material, researchers have typically employed a manual process by which an atom-thin flake is carefully exfoliated from a bulk material, like peeling away the layers of an onion.But most bulk materials are polycrystalline, containing multiple crystals that grow in random orientations. Where one crystal meets another, the &ldquo;grain boundary&rdquo; acts as an electric barrier. Any electrons flowing through one crystal suddenly stop when met with a crystal of a different orientation, damping a material&rsquo;s conductivity. Even after exfoliating a 2D flake, researchers must then search the flake for &ldquo;single-crystalline&rdquo; regions &mdash; a tedious and time-intensive process that is difficult to apply at industrial scales.Recently, researchers have found other ways to fabricate 2D materials, by growing them on wafers of sapphire &mdash; a material with a hexagonal pattern of atoms which encourages 2D materials to assemble in the same, single-crystalline orientation.&ldquo;But nobody uses sapphire in the memory or logic industry,&rdquo; Kim says. &ldquo;All the infrastructure is based on silicon. For semiconductor processing, you need to use silicon wafers.&rdquo;However, wafers of silicon lack sapphire&rsquo;s hexagonal supporting scaffold. When researchers attempt to grow 2D materials on silicon, the result is a random patchwork of crystals that merge haphazardly, forming numerous grain boundaries that stymie conductivity.&nbsp;&ldquo;It&rsquo;s considered almost impossible to grow single-crystalline 2D materials on silicon,&rdquo; Kim says. &ldquo;Now we show you can. And our trick is to prevent the formation of grain boundaries.&rdquo;<h2>Seed pockets</h2>The team&rsquo;s new &ldquo;nonepitaxial, single-crystalline growth&rdquo; does not require peeling and searching flakes of 2D material. Instead, the researchers use conventional vapor deposition methods to pump atoms across a silicon wafer. The atoms eventually settle on the wafer and nucleate, growing into two-dimensional crystal orientations. If left alone, each &ldquo;nucleus,&rdquo; or seed of a crystal, would grow in random orientations across the silicon wafer. But Kim and his colleagues found a way to align each growing crystal to create single-crystalline regions across the entire wafer.To do so, they first covered a silicon wafer in a &ldquo;mask&rdquo; &mdash; a coating of silicon dioxide that they patterned into tiny pockets, each designed to trap a crystal seed. Across the masked wafer, they then flowed a gas of atoms that settled into each pocket to form a 2D material &mdash; in this case, a TMD. The mask&rsquo;s pockets corralled the atoms and encouraged them to assemble on the silicon wafer in the same, single-crystalline orientation.&ldquo;That is a very shocking result,&rdquo; Kim says &ldquo;You have single-crystalline growth everywhere, even if there is no epitaxial relation between the 2D material and silicon wafer.&rdquo;With their masking method, the team fabricated a simple TMD transistor and showed that its electrical performance was just as good as a pure flake of the same material.They also applied the method to engineer a multilayered device. After covering a silicon wafer with a patterned mask, they grew one type of 2D material to fill half of each square, then grew a second type of 2D material over the first layer to fill the rest of the squares. The result was an ultrathin, single-crystalline bilayer structure within each square. Kim says that going forward, multiple 2D materials could be grown and stacked together in this way to make ultrathin, flexible, and multifunctional films.&ldquo;Until now, there has been no way of making 2D materials in single-crystalline form on silicon wafers, thus the whole community has almost given up on pursuing 2D materials for next-generation processors,&rdquo; Kim says. &ldquo;Now we have completely solved this problem, with a way to make devices smaller than a few nanometers. This will change the paradigm of Moore&rsquo;s Law.&rdquo;This research was supported in part by the U.S. Defense Advanced Research Projects Agency, Intel, the IARPA MicroE4AI program, MicroLink Devices, Inc., ROHM Co., and Samsung.<hr>&quot;Reprinted with permission of&nbsp;<a href="https://news.mit.edu/2023/2d-atom-thin-industrial-silicon-wafers-0118" id="isPasted" rel="noopener noreferrer" target="_blank">MIT News</a>&quot; &nbsp;

By depositing atoms on a wafer coated in a “mask” (top left), MIT engineers can corral the atoms in the mask’s individual pockets (center middle), and encourage the atoms to grow into perfect, 2D, single-crystalline layers (bottom right). Courtesy of the researchers. Edited by MIT News.

Their technique could allow chip manufacturers to produce next-generation transistors based on materials other than silicon.

Engineers grow "perfect" atom-thin materials on industrial silicon wafers

Diagnosing and monitoring diseases often rely on the detection of molecules called &ldquo;biomarkers&rdquo;. However, the detection of such biomarkers need periodic blood draws, which are expensive, time consuming, require specialised equipment, and provide no continuous data. To avoid this, and provide real-time biomarker detection, Professor Kevin Plaxco&rsquo;s team at the University of California Santa Barbara pioneered the development of implantable aptamer-based sensors. These devices are electrochemical sensors based on DNA and they successfully track small molecules in real time.A key step to translate these sensors to real-life applications in the clinic is to make them as small and minimally invasive as possible. To solve this miniaturisation challenge, researchers at Cambridge1 teamed up with the Plaxco Lab to discover a way to combine aptamer-based sensors with an amplifying transistor platform. Together, they developed biosensors based on organic electrochemical transistors (OECTs), which maintain high performances of the aptamer sensors even when shrunk to quite small dimensions. The <a href="https://doi.org/10.1126/sciadv.add4111" target="_blank">results</a> are reported in the journal Science Advances.Research student <a href="http://www.eng.cam.ac.uk/profiles/sb2410" target="_blank">Sophia Bidinger</a>, lead author of the paper, said: &ldquo;This work is an important step towards creating better tools for healthcare providers. With this type of sensor, physicians will be able to gain unprecedented real-time data for tracking their patients&rsquo; health.&rdquo;&nbsp;Previous aptamer sensors were made of thin, millimeters-long wires. In contrast, the new transistor biosensors are so small that they are barely visible to the naked eye. This technology will be useful for medical applications that require sensors in delicate areas. For example, such a minimally invasive sensor could enable implantation in the brain &ndash; an ideal region to track biomarkers linked with mental disorders, such as depression.&nbsp;Paper co-author <a href="http://www.eng.cam.ac.uk/profiles/th270" target="_blank">Professor Tawfique Hasan</a> said: &ldquo;There is a huge market opportunity for continuous molecular monitoring. Besides glucose, there are not very many commercially available sensors. More tools for supporting continuous, in vivo sensing will save lives.&rdquo;The cross-disciplinary research team will now explore possible next directions of this work. For example, another benefit of signal amplification is improved lifetime, so the sensor can operate for longer without being replaced. Each of these improvements is one step closer to deployment in humans for tracking anything from drugs to hormones to neurotransmitters.&nbsp;Paper co-author <a href="http://www.eng.cam.ac.uk/profiles/gm603" target="_blank">Professor George Malliaras</a> added: &ldquo;The most exciting aspect of this work is that it could be used to detect virtually any small molecule. This will help doctors gain much more patient specific insight than ever before.&rdquo;&nbsp;<hr>Reference: Sophia L. Bidinger; Scott T. Keene; Sanggil Han; Kevin W. Plaxco; George G. Malliaras; Tawfique Hasan. &lsquo;<a href="https://doi.org/10.1126/science.add8544" target="_blank">Pulsed transistor operation enables miniaturization of electrochemical aptamer-based sensors</a>.&rsquo; Science Advances (2022). DOI: 10.1126/sciadv.add41111&nbsp;From the Electrical Engineering Division, Department of Engineering, and the Department of Physics.

Scalable thin film transistor-based biosensors.  Credit: Ben Woodington

A new method for the miniaturisation of biosensors will enable new possibilities for minimally invasive implants. The miniaturised transistors are fabricated on thin, flexible substrates, and amplify biosignals, producing currents more than 200 times larger than analogous alternatives.

Miniaturised biosensors for minimally invasive implants

NMOS and PMOS are the two main forms of MOSFET. Typically made by carefully controlling silicon oxidation, MOSFETs (metal-oxide-semiconductor field-effect transistors) are a type of field-effect transistor (FET). The conductivity of the device is controlled by a logic gate that is insulated and has a voltage. It is the most common type of FET (field-effect transistor) used to switch or amplify voltages in circuits. It is a voltage-controlled device and is constructed by three terminals. The terminals of MOSFET are the source, the drain, the gate, and the base. Commonly the base is connected to the source terminal. Depending on the semiconductor&#39;s doping, the substrate, source, and drain are all positive or negative.These are separated from the metal (or conductive silicon) gate terminal by a non-conductive oxide layer. The electrical properties of the semiconductor under the gate are altered by applying a voltage, which permits or prevents the flow of electricity between the source and drain. Bipolar junction transistors (BJTs) are no longer as ubiquitous in digital and analog circuits as MOSFETs. MOSFET is the underlying technology for most discrete transistors, digital logic gates, integrated circuits (IC), and thin-film transistor (TFT) LCDs. They are regarded as the most produced item in human history and are the workhorse of contemporary electronics.[1]Since they can be made with either p-type semiconductors often called PMOS (Positively Doped Metal Oxide Semiconductor) or n-type semiconductors often called NMOS (Negatively Doped Metal Oxide Semiconductors), complementary pairs of MOS transistors can be used to make switching circuits with very low power consumption, in the form of CMOS (complementary metal-oxide semiconductor) logic. MOSFETs are used for inverter applications with a switching frequency exceeding 20 kHz.<h2 dir="ltr">PMOS Explained</h2>When p-type dopants are utilized in the gate area (the channel), the transistor is known as a p-channel metal-oxide semiconductor (pMOS) or PMOSFET. The device activates when the gate receives a negative voltage. PMOS or pMOS also referred to as P-type metal-oxide-semiconductor logic, is a category of the digital circuit built employing metal-oxide-semiconductor field effect transistors (MOSFET) with a p-type semiconductor source and drain printed on a bulk n-type &quot;well.&quot; By reducing the high voltage on the logic gates, the resulting circuit can be &quot;turned on&quot; by allowing electron holes to flow between the source and drain. PMOS circuits are simpler to manufacture than NMOS circuits because they are less vulnerable to electronic noise. In the 1970s, when microprocessor technology was still in its infancy, they were frequently used. In comparison to the NMOS and CMOS alternatives, PMOS has many drawbacks, such as the requirement for a variety of supply voltages (both positive and negative), high power dissipation in the conducting state, and very big features. Additionally, the changeover pace is slower overall.[2]<h2 dir="ltr">NMOS Explained</h2>NMOS devices are N-channel metal-oxide semiconductors (NMOS) often called the NMOS logic family. They are a type of microelectronic circuit used in the design of complementary metal-oxide semiconductors (CMOS) and logic and memory circuits. A greater number of NMOS transistors can be accommodated on a single chip than their P-channel metal-oxide semiconductor (PMOS) cousin. The p-type transistor body in these nMOS transistors is converted into an inversion layer to carry out their function. Between the n-type &quot;source&quot; and &quot;drain&quot; terminals, this inversion layer, known as the n-channel, can conduct electrons. The third terminal, known as the gate, receives voltage to produce the n-channel MOSFET. With the development of superior fabrication methods, including the continued removal of impurities from the silicon stock that reduced noise, PMOS was superseded by NMOS. [3]<h2 dir="ltr">Transistor Types of PMOS vs NMOS: Compare and Contrast</h2>The primary distinction between PMOS and NMOS is in the two systems&#39; various structures. While NMOS uses N-type doped semiconductors as source and drain and P-type as the substrate, those of a PMOS device are the reverse. When exposed to a non-negligible voltage, an NMOS (negative-MOS) transistor creates a closed circuit; when exposed to a voltage of about 0 volts, it makes an open circuit. A PMOS (positive-MOS) transistor forms an open circuit when it gets a non-negligible voltage and a closed circuit when it receives a voltage of about 0 volts. NMOS is more frequently employed than PMOS because of its advantages, however, PMOS is still needed in many applications because of its polarization characteristics.Additionally, both NMOS and PMOS are frequently employed in analog and digital microelectronics. In particular, the CMOS (complementary MOS) structure, one of the most common MOS structures, applies to both PMOS and NMOS. &nbsp;The ON resistance of an NMOS is roughly half that of a PMOS, although PMOS is less noise-prone. For the same output current, NMOS transistors offer a smaller footprint than PMOS transistors, and NMOS is also quicker than PMOS. In conclusion, NMOS and PMOS should both be created to function symmetrically.<h2 dir="ltr">MOSFET Third Terminal: The Body-Effect</h2>Although the three MOSFET terminals; gate, drain, and source can be used to illustrate how a transistor operates, the MOSFET is essentially a 4-pin device. The transistor&#39;s substrate is connected to the fourth port, which is referred to as the body. The transistor&#39;s substrate is attached to the body port, which is the fourth port overall. The transistor will experience what is called the body effect if the voltage difference between the source and the body is greater than zero. Body-effect refers to the change in the transistor threshold voltage resulting from a voltage difference between the transistor source and body. The body can be viewed as a second gate that aids in determining how the transistor switches on and off since the voltage difference between the source and body influences the threshold voltage.<h2 dir="ltr">Construction and Physical Operation</h2>MOS transistors are constructed on silicon wafers. To create N-type, P-type, and insulating zones, this technique uses layer-by-layer semiconductor doping and oxide growth. To produce geometric shapes, photolithography and chemical etching are employed. The drain and source voltage regions are strongly doped with either N-dopants (NMOS) or P-dopants (PMOS), whereas the substrate is extensively doped with the opposing type (N-type for PMOS and P-type for NMOS). Due to the depletion region created by this alternation, no current can move from the source to the drain.The substrate and the Gate are separated from one another by a thin layer of silicon dioxide to which the Gate is bonded. Minority carriers are drawn to the area below the SiO2 layer by the electric field when voltage is applied to the gate, which is the field-effect transistor (FET) portion of a MOSFET. When there is sufficient charge in that area, the minority carriers merge with the majority carriers to produce a channel similar to the drain and source.The voltage that causes channel inversion, or the threshold voltage, is the voltage from the gate to the source. In NMOS, the construction of channels requires positive voltages to draw in electrons (positive voltages), while in PMOS, the construction of channels requires negative voltages to draw in holes.As long as VDS (voltage between drain and source) forms a low voltage, lower than the difference between Gate voltage, also known as VGS (voltage between Gate and Source) and VTH (threshold voltage), the channel exhibits ohmic resistance for a fixed VGS (linear operation mode). The channel then gets &quot;pinched&quot; and the charge concentration close to the drain is nullified. The boundary separating the linear and saturated zones is known as channel pinch-off. The channel-length modulation effect previously stated occurs as VDS rises because the pinch point shifts and the channel&#39;s effective length decreases.[4]Recommended reading: <a href="https://www.wevolver.com/article/silicon-wafers-everything-you-need-to-know" target="_blank">Silicon Wafers: Everything You Need to Know</a><h2 dir="ltr"><img src="https://s3-us-west-1.amazonaws.com/wevolver-project-images/froala%2F1666767283975-mosfet.jpg" width="450" height="313" class="fr-fic fr-dii">MOSFET Electronic Package</h2><h2 dir="ltr">NMOS and PMOS: Utilization</h2>The NMOS and PMOS can be utilized as active loads, capacitors, voltage-controlled resistors, current reflectors, diodes, and even trans-impedance amplifiers, it is however challenging to discuss every application for them. Therefore, we will concentrate on the two most common applications: switches and voltage amplifiers. But in other situations, the same logic that was utilized here would work.<ul><li dir="ltr"><h3 dir="ltr">Switch</h3></li></ul>A good switch has two properties: a very large impedance when off and a very small impedance when on. If the circuit isn&#39;t opened, leakage currents will flow through, making the signal path uncontrolled. The signal will fade and power losses will increase if it doesn&#39;t shut down.With large impedance channels in the cut-off region and low series resistance in the linear area, MOSFETS excels at both characteristics. The control circuit is substantially simplified by the separation of the command signal from the signal path. In switched-mode power converters, low resistance and high gate impedance are preferred since they significantly increase efficiency.Additionally, MOS switches&#39; small footprint considerably increases the density of logic ports on a single chip, which was essential for the current technology&#39;s digital revolution. Both NMOS and PMOS transistors can be used to create switches, depending on the control signal and current flow. It is crucial to design the transistor to have a very low resistance point in the closed state in microelectronics applications where MOSFET dimensions can be adjusted.To prevent crosstalk through the transistor when it is in the open state, parasitic capacitances should also be kept to a minimum. Monitoring is required for several properties, including peak voltage, charge injection, maximum current, and switching time. The transistor switch should be chosen when employing discrete MOSFETs, as most switched-mode power converters do, taking into account all of the aforementioned factors as well as heat dissipation and gate driving. There are numerous topologies for MOSFET switches.<ul><li dir="ltr"><h3 dir="ltr">Amplifier</h3></li></ul>Since NMOS and PMOS are both &quot;voltage to current&quot; converters, a voltage amplifier can be produced by merely connecting a resistive load to the current output. In contrast, for the drain current to serve as an appropriate current source, the drain current must be independent of the drain voltage (in other words, the output impedance should be high). The MOSFET must therefore operate in the saturation area to function as a voltage amplifier. The input signal should also be reduced to a minimum to prevent non-linear effects due to the existing equations&#39; extreme non-linearity. The literature has methods for circuit linearization.There are three types of MOSFET amplifiers: &nbsp;common-gate, common-drain, and common-source. What sets each pin apart is its function.<h4 dir="ltr">Common-Gate</h4>A set voltage is applied to the Gate, and the Source serves as the input. This amplifier&#39;s input impedance is extremely low because the signal is connected to the Source. The miller effect is, however, removed, leading to a gain in bandwidth, There is moreover yet another. When used in high-frequency applications, it is frequently used for current-to-voltage conversion.<h4 dir="ltr">Common-Drain</h4>This amplifier connects the drain to a fixed voltage and uses the gate and source as outputs. Due to the constant and linear voltage unit gain it provides, this design is frequently used in buffers. The voltage applied to the Drain of the transistors is often called VDD.<h4 dir="ltr">Common-Source</h4>The source is connected to a fixed source voltage, the drain is coupled to a resistive load for amplification, and the gate is utilized as the input. High gains and high input impedance are the major applications of the common-source. However, the circuit&#39;s frequency is constrained by the miller effect and the gain is negative.<h2 dir="ltr">Key Takeaway</h2>MOSFETs are frequently utilized in high-speed switching and integrated circuits. To produce a conducting channel between the source and drain contacts, MOSFETs apply a voltage to the oxide-insulated gate electrode. MOSFETs are divided into two categories: NMOSFET (also known as NMOS) and PMOSFET, depending on the type of carriers passing through the channel (often known as PMOS). On the other hand, complementary metal-oxide semiconductor (CMOS) is a sort of metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication method that employs complementary and symmetrical pairs of p-type and n-type MOSFETs for logic tasks.It suffices to remark that a hole serves as the PMOS transistor&#39;s carrier. A transistor&#39;s NMOS carrier is an electron. Both electrons and holes serve as the CMOS transistor&#39;s carriers. While CMOS is an integrated circuit constructed with both NMOS and PMOS transistors, PMOS and NMOS are straightforward enhancement or depletion-type devices. In contrast to the CMOS transistor, which has two properties shared by both NMOS and PMOS, PMOS and NMOS each have a single feature. CMOS has high speed, more functions, and low noise compared to NMOS and PMOS transistors.<h2 dir="ltr">Reference</h2><ol><li dir="ltr">Electronics For You. (2022) What is a MOSFET? It&rsquo;s Types, Working, Circuits, and Applications. Available at: <a href="https://www.electronicsforu.com/technology-trends/learn-electronics/mosfet-basics-working-applications" target="_blank">https://www.electronicsforu.com/technology-trends/learn-electronics/mosfet-basics-working-applications</a> [Accessed 20th October 2022].</li></ol><ol start="2"><li dir="ltr">LaBouff, S. (2021) The History of Mosfet and micro-Biotech. Available at: <a href="https://medium.com/@seanlabouff_9026/the-history-of-mosfets-and-micro-biotech-a230d510f33e" target="_blank">https://medium.com/@seanlabouff_9026/the-history-of-mosfets-and-micro-biotech-a230d510f33e</a> [Accessed 20th October 2022].</li></ol><ol start="3"><li dir="ltr">Behara, R., Karmakar, P., and &nbsp;Lenka, A. (2018): A comparative analysis of NMOS and PMOS used in 180nm process CMOS inverter. DOI:10.1109/ICISC.2018.8398877.</li><li dir="ltr">Electrical Engineering. (n/a). Explain in layman&#39;s terms Vgs and Vgs(th) of MOSFET. Available at: <a href="https://electronics.stackexchange.com/questions/157065/explain-in-laymans-terms-vgs-and-vgsth-of-mosfets" target="_blank">https://electronics.stackexchange.com/questions/157065/explain-in-laymans-terms-vgs-and-vgsth-of-mosfets</a> [Accessed 21st October 2022].</li></ol>

NMOS and PMOS are the main forms of MOSFET. This article describes in reasonable detail, what PMOS and NMOS are. It also describes the types of PMOS and NMOS transistors, the body effect, construction and physical operation, and their applications.

PMOS VS NMOS: Focus on Two Main Forms of MOSFET

Unipolar transistors or Field Effect Transistors (FETs), as the name suggests use only one type of charge carrier, either electrons or holes depending on the type of semiconductor material used. If an N-type semiconductor is used the charge carriers are electrons while if a P-type semiconductor is used the charge carriers are holes. In the case of a BJT, both electrons and holes could be used as charge carriers.<h2 dir="ltr">What is a BJT?</h2>A Bipolar Junction Transistor (BJT or BJT Transistor) is a three-terminal semiconductor device composed of two P-N junctions that can amplify or magnify a signal. The three terminals of the BJT are the base, the collector, and the emitter. The primary function of a BJT is to amplify current, which allows BJTs to be used as amplifiers. Another important application of BJT is switching circuits. Hence they are widely used as amplifiers and switches in electronic equipment such as mobile phones, industrial control, television, and radio transmitters.&nbsp;<img src="https://images.wevolver.com/eyJidWNrZXQiOiJ3ZXZvbHZlci1wcm9qZWN0LWltYWdlcyIsImtleSI6ImZyb2FsYS8xNjYwNzIxNjE4Nzc3LVBOUC5qcGciLCJlZGl0cyI6eyJyZXNpemUiOnsid2lkdGgiOjk1MCwiZml0IjoiY292ZXIifX19" style="width: 800px;" class="fr-fic fr-dib" alt="Transistor diagram">Detailed transistor diagramA bipolar junction transistor is created by combining two doped semiconductor materials that are back-to-back. In other words, a BJT is formed by a &quot;sandwich&quot; of extrinsic semiconductor materials placed back to back. Two PN junction diodes are sandwiched together to form a BJT. The PN junction that connects the base and emitter region is called the BE-junction while the junction connecting the base and collector is called the BC-junction. The Base region is slightly doped and is thinner as compared to other regions. The Emitter region is highly doped while the Collector has balanced doping. The Emitter terminal emits charge carriers, which are electrons in the case of NPN type and holes in the case of PNP type BJT.Charge flow in a BJT is due to the diffusion of charge carriers across a junction between two regions of different charge carrier concentrations. In a typical operation, the BE-junction is forward biased, which means that the P-type layer is at a more positive potential than the N-type layer, and the BC-junction is reverse-biased. When forward biased the electrons (in case of NPN) and holes (in case of PNP) get thermally excited causing them to break the depletion layer and enter into the Base layer and recombine with holes or electrons depending upon the type of transistor. The Base layer is thinner and lightly doped so as to reduce the number of recombinations in the base layer, ensuring electrons/holes reach the CB junction. The CB junction is reverse-biased prevening movement of majority carriers from collector to base, but the carriers from the emitter break the CB depletion region to reach the collector layer because of the applied electric field.A BJT has four distinct regions of operation depending on the biasing polarity and magnitude they are discussed below:<ul id="isPasted"><li dir="ltr">Forward-active mode: This is the most commonly used mode of operation where the BE junction is forward biased and the CB junction is reverse biased. If this is the case, the collector-emitter current is approximately proportional to the base current, but many times larger, for small base current variations. This mode offers the greatest amount of current gain.</li><li dir="ltr">Reverse-active mode: By reversing the biasing conditions of the forward-active region, a bipolar transistor goes into reverse-active mode. In this mode, the emitter and collector regions switch roles.</li><li dir="ltr">Saturation mode: When both the junctions are forward biased and the BJT acts as a closed switch facilitating the flow of current.</li><li dir="ltr">Cut-off mode: In the cut-off mode both the junctions are reverse biased and the BJT does not allow current to flow through it, hence it acts like an open switch.</li></ul>The Forward-active mode of operation is used when the BJT is to be used as an amplifier and the Cut-off and Saturation mode are together used when the BJT is to be used as a switch.<h2 dir="ltr">Types of BJT transistor- NPN and PNP</h2>Based on the nature of doping of the three semiconductor layers, BJTs are classified as PNP or NPN. A PNP transistor is made up of two P-type semiconductor junctions that share a thin N-doped region, whereas an NPN transistor is made up of two N-type semiconductor junctions that share a thin P-doped region. N-type means doped with impurities that provide mobile electrons (such as phosphorus or arsenic), whereas P-type means doped with impurities that provide holes that readily accept electrons (such as boron). A PNP BJT will function like two diodes that share an N-type cathode region, and the NPN like two diodes sharing a P-type anode region.&nbsp;<img src="https://s3-us-west-1.amazonaws.com/wevolver-project-images/froala%2F1660721832000-pnp_npn.jpg" style="width: 800px;" class="fr-fic fr-dib" alt="NPN and PNP transistor">NPN and PNP transistorBoth types of BJT work by giving amplified output from the collector with a small current input to the base. As a result, the BJT functions well as a switch controlled by its base input. The BJT is also an excellent amplifier because it can boost a weak input signal to about 100 times its original strength. BJT networks are used to create powerful amplifiers with a wide range of applications.<h2 dir="ltr">What are the differences between NPN and PNP transistors?</h2>Both NPN and PNP transistors have differences based on their construction, operation, and applications. One of the striking differences is in the NPN transistor, the current flows from the collector to the emitter when a positive supply is applied to the base, whereas in the PNP transistor, the charge carrier flows from the emitter to the collector when a negative supply is applied to the base. The following table shows the comparisons between the two types of BJT based on different parameters.<table style="width: 100%;"><tbody><tr><td style="width: 33.2665%;">Parameter</td><td style="width: 33.2665%;">NPN type</td><td style="width: 33.3333%;">PNP type</td></tr><tr><td style="width: 33.2665%;">Structure</td><td style="width: 33.2665%;">Two N-type layers separated by one P-type layer</td><td style="width: 33.3333%;">Two P-type layers separated by one N-type layer</td></tr><tr><td style="width: 33.2665%;">Direction of current&nbsp;</td><td style="width: 33.2665%;">Collector to Emitter</td><td style="width: 33.3333%;">Emitter to Collector</td></tr><tr><td style="width: 33.2665%;">Turn-on instance</td><td style="width: 33.2665%;">When electrons enter into the base</td><td style="width: 33.3333%;">When holes enter the base</td></tr><tr><td style="width: 33.2665%;">Majority carriers</td><td style="width: 33.2665%;">Electrons are the majority carriers</td><td style="width: 33.3333%;">Holes are the majority carriers</td></tr><tr><td style="width: 33.2665%;">Minority carriers</td><td style="width: 33.2665%;">Holes are the minority carriers</td><td style="width: 33.3333%;">Electrons are the minority carriers</td></tr><tr><td style="width: 33.2665%;">Switching time</td><td style="width: 33.2665%;">Lesser switching time hence faster switching</td><td style="width: 33.3333%;">Higher switching time hence slower switching</td></tr><tr><td style="width: 33.2665%;">Inside current</td><td style="width: 33.2665%;">Develop because of the varying position of electrons</td><td style="width: 33.3333%;">Originate because of the varying position of holes</td></tr><tr><td style="width: 33.2665%;">Turn-off instance</td><td style="width: 33.2665%;">Switches off by applying a low base voltage</td><td style="width: 33.3333%;">Switches off by applying a positive base voltage</td></tr></tbody></table><h2 dir="ltr" id="isPasted">Transistor as a Switch&nbsp;</h2>A transistor is generally used for two types of applications, switching type operations and amplification of signals. A solid-state switch can be created using a transistor. The transistor functions as a closed switch when operated in the saturation zone and as an open switch when operated in the cutoff area. Both PNP and NPN transistors can be utilized as switches. A transistor conducts current across the collector-emitter path only when a voltage is applied to the base. When no base voltage is present, the switch is off. When the base voltage is present, the switch is on.&nbsp;To operate the transistor in the cut-off region (open-switch) both the PN junctions are reversed biased causing input and output current to be zero and voltage across the transistor to be maximum. Hence operating as an open switch. To operate the transistor in the saturation region (open-switch) both the PN junctions are forward biased causing input and output current to be maximum and voltage across the transistor to be minimum. Hence operating as a closed switch.&nbsp;<h2 dir="ltr">NPN transistor switching circuit</h2>To operate the NPN transistor as a switch the voltage applied at the base terminal is varied. When a sufficient voltage (generally greater than 0.7V) &nbsp;is applied between the base and emitter terminals, collector to emitter voltage is approximately equal to 0 which implies that the transistor acts as a short circuit or closed switch. Similarly, when no voltage or zero voltage is applied at the input, the transistor operates in the cutoff region and acts as an open circuit.<h2 dir="ltr">PNP transistor switching circuit</h2>In a PNP-type transistor the base terminal is always negatively biased with respect to the emitter terminal and hence the current always flows from the base. When the voltage is applied at the base the transistor acts as a closed switch and when the voltage applied at the base terminal is zero the transistor acts as an open switch.<h2 dir="ltr">Applications</h2>A large number of electronics that we use in our daily lives use both NPN and PNP types of transistors in different switching and amplification applications. As amplifiers, they are used in various oscillators, modulators, and detectors. Some of the applications are mentioned below:<ul><li dir="ltr">Bipolar Junction Transistors(BJT) amplify current from the emitter to the collector when a small amount of current is passed through the base. This property is used in communication circuits to amplify weak signals over long-distance communications.</li><li dir="ltr">They are used in sound modulators and amplifier circuits.</li><li dir="ltr">They are used as switches to control the switching of appliances like LEDs and motors.</li><li dir="ltr">Darlington pair is two back-to-back BJTs used to obtain high current gain for high power applications.</li><li dir="ltr">Phototransistors are bipolar devices that conduct when light falls on the base. This property is used to detect the presence of light in various automation applications.</li><li dir="ltr">They are in multivibrator circuits which are used to implement a variety of simple two-state devices such as relaxation oscillators, timers, and flip-flops.&nbsp;</li></ul><h2 dir="ltr">Key Takeaways</h2>Bipolar junction transistors find a variety of applications in different electronic equipment. They are solid state devices that are used in switching and amplification operations. The article would help readers understand and appreciate the engineering marvel which forms the base of almost every complex electronic device that exists today. Some of the key takeaways from the article are:<ul><li dir="ltr">BJT is a three-terminal semiconductor device formed consisting of three semiconductor layers.</li><li dir="ltr">Based on the type and placement of the semiconductor layer they are divided into NPN and PNP types.</li><li dir="ltr">PNP type has two P-type layers with an N-type layer between them. While the NPN type has two N-type layers with a P-type layer between them.</li><li dir="ltr">The main differences between these two types of transistors were also understood.</li><li dir="ltr">Working of BJTs as switches were also studied. Both NPN and PNP types can be used as switches but the NPN type is preferred as the majority carriers are electrons which are more mobile.</li><li dir="ltr">The applications of BJT were also discussed towards the end.</li></ul><h2 dir="ltr" id="isPasted">References</h2>[1] <a href="https://pnpntransistor.com/applications-of-transistor-in-daily-life/" target="_blank">https://pnpntransistor.com/applications-of-transistor-in-daily-life/</a>[2]<a href="https://www.electrical4u.com/bipolar-junction-transistor-or-bjt-n-p-n-or-p-n-p-transistor/" target="_blank">https://www.electrical4u.com/bipolar-junction-transistor-or-bjt-N-P-N-or-P-N-P-transistor/</a>[4] <a href="https://www.electricaltechnology.org/2020/04/pnp-transistor.html" target="_blank">https://www.electricaltechnology.org/2020/04/pnP-transistor.html</a>

Transistor with three terminal— Emitter, Base, Collector

Bipolar junction transistors find a variety of applications in different electronic equipment. The article would help readers understand and appreciate the engineering marvel which forms the base of almost every complex electronic device that exists today.

NPN vs PNP BJT Transistor: Understanding the basics

Topological materials move electrons along their surface and edges without any loss, making them promising materials for dissipationless, high-efficiency electronics. Researchers are especially interested in using these materials as transistors, the backbone of all modern electronics. But there’s a problem: Transistors switch electronic current on and off, but it’s difficult to turn off the dissipationless flow of electrons in topological materials. &nbsp;Now, Harvard University researchers have designed and simulated the first topological acoustic transistors — with sound waves instead of electrons — and proposed a connection architecture to form a universal logic gate that can switch the flow of sound on and off.&nbsp;“Since the advent of topological materials around 2007, there has been a lot of interest in developing a topological electronic transistor,” said&nbsp;<a href="https://www.seas.harvard.edu/person/jenny-hoffman" target="_blank">Jenny Hoffman</a>, the Clowes Professor of Science at the&nbsp;<a href="https://www.seas.harvard.edu/" target="_blank">Harvard John A. Paulson School of Engineering and Applied Sciences&nbsp;</a>(SEAS) and the Department of Physics. &nbsp;“Although the materials we used won't yield an electronic topological transistor, our general design process applies to both quantum materials and photonic crystals, raising hopes that electronic and optical equivalents may not be far behind.”&nbsp;The research is published in Physical Review Letters.&nbsp;By using acoustic topological insulators, the researchers were able to sidestep the complicated quantum mechanics of electron topological insulators.&nbsp;“The equations for sound waves are exactly solvable, which allowed us to numerically find just the right combination of materials to design a topological acoustic waveguide that turns on when heated, and off when cooled,” said Harris Pirie, a former graduate student in the Department of Physics and first author of the paper.&nbsp;Pirie is currently a Marie Curie Postdoctoral Fellow at Oxford University.The researchers used a honeycomb lattice of steel pillars anchored to a high-thermal-expansion plate, sealed in an air-tight box. The lattice has slightly larger pillars on one half, and slightly smaller pillars on the other half. These differences in size and spacing of the pillars determine the topology of the lattice, whether sound waves can travel along a designated channel or not. The researchers then designed a second device that converts ultrasound into heat.&nbsp;The heat expands the pillar lattice and changes the topology of the waveguide. When coupled together, these two devices allow the output of one waveguide to control the state of the next, just as the electrons flowing in a conventional transistor can toggle other transistors.<img src="https://s3-us-west-1.amazonaws.com/wevolver-project-images/froala%2F1641469960524-ezgif-7-8bded6a916.gif" style="width: 766px;" class="fr-fic fr-dib">These acoustic topological switches are scalable, meaning the same design used with ultrasonic frequencies at the centimeter scale could also work at sub-millimeter sizes and frequencies commonly used to transmit surface acoustic waves, which may help to overcome limitations in integrated phononic circuits.“The control of topologically protected acoustic transport has applications in a number of important fields including efficient acoustic-noise reduction, one-way acoustic propagation, ultrasound imaging, echolocation, acoustic cloaking, and acoustic communications,” said Pirie.These acoustic metamaterials could also be used as a teaching tool.&nbsp;“Unlike quantum-mechanical systems, acoustic metamaterials are straightforward, tangible, and intuitive. They serve as an accessible entry point to cutting edge topics in condensed matter physics, including topological insulators,” said Hoffman.The team plans to make a public-facing demonstration of these devices that students or museum visitors can touch, toggle, and hear.The research was co-authored by Harvard undergraduates Shuvom Sadhuka and Radu Andrei, as well as MIT graduate student Jennifer Wang.

Model of a honeycomb lattice that can be rapidly expanded using SMA coils to create a high thermal expansion coefficient. (Credit: Hoffman Lab/Harvard SEAS)

Sound waves may pave the way for topological electronic transistors

The first topological acoustic transistor

In this episode, we talk about the injectable microchip from Columbia University along with its applications in clinical settings, a global effort to develop two dimensional transistors, and a NASA Pathways Intern who created an AI powered system capable of detecting spacecraft failures. As always, you can find these and other interesting &amp; impactful engineering articles on Wevolver.com.<iframe height="200px" width="100%" frameborder="no" scrolling="no" seamless="" src="https://player.simplecast.com/ef862d63-d4d0-42c8-a100-d5826f66fcc2?dark=false" class="fr-draggable"></iframe>&nbsp;<h3>EPISODE NOTES</h3>Take a few seconds to leave us a review. It really helps! <a href="https://apple.co/2RIsbZ2" target="_blank">https://apple.co/2RIsbZ2</a> if you do it and send us proof, we’ll give you a shoutout on the show.&nbsp;(0:42) - <a href="https://www.wevolver.com/article/tiny-wireless-injectable-chips-use-ultrasound-to-monitor-body-processes" target="_blank">Injectable Microchips</a>:Researchers at Columbia University have developed a microchip the size of a grain of salt that can be injected into a patient and act as a wireless temperature sensor. The chip is powered by and communicates to a standard ultrasound probe from outside the body.&nbsp;(9:00) - <a href="https://www.wevolver.com/article/advance-may-enable-2d-transistors-for-tinier-microchip-components" target="_blank">2D Transistors</a>:Moore’s law has dictated the progress of computational power for the past few decades but lately, it seems like we’ve hit the physical limit of transistor development. There’s now an international effort led by MIT and UC Berkeley to explore 2D transistors which could pave the way for keeping up with Moore’s Law again.&nbsp;(17:10) - <a href="https://www.wevolver.com/article/nasa-ai-technology-could-speed-up-fault-diagnosis-process-in-spacecraft" target="_blank">AI For Spacecraft Diagnosis</a>:NASA Pathways intern Evanna Gizzi has been working on Research in Artificial Intelligence for Spacecraft Resilience (RAISR) which aims to autonomously detect the root cause of spacecraft failures. RAISR is like an AI engineer that lives in the brain of a spacecraft to identify and remedy spacecraft failures.--About the podcast:Every day, some of the most innovative universities, companies, and individual technology developers share their knowledge on Wevolver. To ensure we can also provide this knowledge for the growing group of podcast listeners, we started a collaboration with two young engineers, Daniel Scott Mitchell &amp; Farbod Moghaddam who discuss the most interesting content in this podcast series.&nbsp;To learn more about this show, please visit the&nbsp;<a href="https://www.wevolver.com/profile/the.next.byte" target="_blank">shows page</a>. By following the page, you will get automatic updates by email when a new show is published.Be sure to give us a follow and review on <a href="https://podcasts.apple.com/nl/podcast/the-next-byte/id1548255861?l=en" rel="nofollow" target="_blank">Apple</a> podcasts, <a href="https://open.spotify.com/show/6lPPsRtegnivsRUEsQ09R7?si=IPMiah7xT_apJtPjqvXMlA" rel="nofollow" target="_blank">Spotify</a>, and most of your favorite podcast platforms!

In this episode, we talk about the injectable microchip from Columbia University along with its applications in clinical settings, a global effort to develop two dimensional transistors, and a NASA Pathways Intern who created an AI powered system capable of detecting spacecraft failures.

Podcast: Injectable Microchips, 2D Transistors, AI For Spacecraft Diagnosis

Since the discovery of graphene, two-dimensional materials have been the focus of materials research. Among other things, they could be used to build tiny, high-performance transistors. Researchers at ETH Zurich and EPF Lausanne have now simulated and evaluated one hundred possible materials for this purpose and discovered 13 promising candidates.&nbsp;With the increasing miniaturization of electronic components, researchers are struggling with undesirable side effects: In the case of nanometer-scale transistors made of conventional materials such as silicon, quantum effects occur that impair their functionality. One of these quantum effects, for example, is additional leakage currents, i.e. currents that flow "astray" and not via the conductor provided between the source and drain contacts.It is therefore believed that Moore's scaling law, which states that the number of integrated circuits per unit area doubles every 12-18 months, will reach its limits in the near future because of the increasing challenges associated with the miniaturisation of their active components. This ultimately means that the currently manufactured silicon-based transistors — called FinFETs and equipping almost every supercomputer — can no longer be made arbitrarily smaller due to quantum effects.<h2>Two-dimensional beacons of hope</h2>However, a new study by researchers at ETH Zurich and EPF Lausanne shows that this problem could be overcome with new two-dimensional (2-D) materials — or at least that is what the simulations they have carried out on the "Piz Daint" supercomputer suggest.The research group, led by Mathieu Luisier from the Institute for Integrated Systems (IIS) at ETH Zurich and Nicola Marzari from EPF Lausanne, used the research results that Marzari and his team had already achieved as the basis for their new simulations: Back in 2018, 14 years after the discovery of graphene first made it clear that two-dimensional materials could be produced, they used complex simulations on "Piz Daint" to sift through a pool of more than 100,000 materials; they extracted 1,825 promising components from which 2-D layers of material could be obtained.The researchers selected 100 candidates from these more than 1,800 materials, each of which consists of a monolayer of atoms and could be suitable for the construction of ultra-scaled field-effect transistors (FETs). They have now investigated their properties under the "ab initio" microscope. In other words, they used the CSCS supercomputer "Piz Daint" to first determine the atomic structure of these materials using density functional theory (DFT). They then combined these calculations with a so-called Quantum Transport solver to simulate the electron and hole current flows through the virtually generated transistors. The Quantum Transport Simulator used was developed by Luisier together with another ETH research team, and the underlying method was awarded the Gordon Bell Prize in 2019.<h2>Finding the optimal 2-D candidate</h2>The decisive factor for the transistor’s viability is whether the current can be optimally controlled by one or several gate contact(s). Thanks to the ultra-thin nature of 2-D materials — usually thinner than a nanometer — a single gate contact can modulate the flow of electrons and hole currents, thus completely switching a transistor on and off."Although all 2-D materials have this property, not all of them lend themselves to logic applications," Luisier emphasizes, "only those that have a large enough band gap between the valence band and conduction band.” Materials with a suitable band gap prevent so-called tunnel effects of the electrons and thus the leakage currents caused by them. It is precisely these materials that the researchers were looking for in their simulations.Their aim was to find 2-D materials that can supply a current greater than 3 milliamperes per micrometre, both as n-type transistors (electron transport) and as p-type transistors (hole transport), and whose channel length can be as small as 5 nanometres without impairing the switching behaviour. "Only when these conditions are met can transistors based on two-dimensional materials surpass conventional Si FinFETs," says Luisier.<h2>The ball is now in the experimental researchers' court</h2>Taking these aspects into account, the researchers identified 13 possible 2-D materials with which future transistors could be built and which could also enable the continuation of Moore's scaling law. Some of these materials are already known, for example black phosphorus or HfS2, but Luisier emphasizes that others are completely new — compounds such as Ag2N6 or O6Sb4."We have created one of the largest databases of transistor materials thanks to our simulations. With these results, we hope to motivate experimentalists working with 2-D materials to exfoliate new crystals and create next-generation logic switches," says the ETH professor. The research groups led by Luisier and Marzari work closely together at the National Centre of Competence in Research (NCCR) MARVEL and have now published their latest joint results in the journal ACS Nano. They are confident that transistors based on these new materials could replace those made of silicon or of the currently popular transition metal dichalcogenides.<hr>This text by Simone Ulmer first appeared in English on the <a href="https://www.cscs.ch/science/chemistry-materials/2020/simulation-microscope-examines-transistors-of-the-future/" target="_blank">CSCS</a> website.&nbsp; &nbsp; &nbsp; &nbsp;<h2>Reference</h2>Klinkert C, Szabo A, Stieger C, Campi D, Marzari N &amp; Luisier M: 2-D Materials for Ultra-Scaled Field-Effect Transistors: Hundred Candidates under the Ab Initio Microscope, ACS Nano (2020), DOI: <a href="https://dx.doi.org/10.1021/acsnano.0c02983" target="_blank">10.1021/acsnano.0c02983</a><hr>Source: Simone Ulmer, <a href="https://ethz.ch/en/news-and-events/eth-news/news/2020/08/simulation-microscope-examines-transistors.html" rel="noopener noreferrer" target="_blank">ETH Zurich</a>.

Structure of a single-​gate FET with a channel made of a 2-D material. Arranged around it are a selection of 2-D materials that have been investigated. (Graphics: ETH Zurich / EPFL / CSCS)

Since the discovery of graphene, two-​dimensional materials have been the focus of materials research. Among other things, they could be used to build tiny, high-​performance transistors.